Timing Analyzer report for BarrierShaper
Mon Sep 19 16:00:33 2005
Version 5.0 Build 168 06/22/2005 Service Pack 1 SJ Web Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Timing Analyzer Summary
  3. Timing Analyzer Settings
  4. Clock Settings Summary
  5. Clock Setup: 'Clk'
  6. Clock Hold: 'Clk'
  7. tsu
  8. tco
  9. tpd
 10. th
 11. Timing Analyzer Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2005 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic       
functions, and any output files any of the foregoing           
(including device programming or simulation files), and any    
associated documentation or information are expressly subject  
to the terms and conditions of the Altera Program License      
Subscription Agreement, Altera MegaCore Function License       
Agreement, or other applicable license agreement, including,   
without limitation, that your use is for the sole purpose of   
programming logic devices manufactured by Altera and sold by   
Altera or its authorized distributors.  Please refer to the    
applicable agreement for further details.



+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Summary                                                                                                                                                                                                        ;
+------------------------------+------------+-----------------------------------+----------------------------------+-------------------------------+--------------------------------------+------------+----------+--------------+
; Type                         ; Slack      ; Required Time                     ; Actual Time                      ; From                          ; To                                   ; From Clock ; To Clock ; Failed Paths ;
+------------------------------+------------+-----------------------------------+----------------------------------+-------------------------------+--------------------------------------+------------+----------+--------------+
; Worst-case tsu               ; N/A        ; None                              ; 8.806 ns                         ; USB[15]                       ; BSSlow:inst|DACsData                 ;            ; Clk      ; 0            ;
; Worst-case tco               ; N/A        ; None                              ; 9.476 ns                         ; BS2:ADChandler|ADCsCS         ; ADCsCS                               ; Clk        ;          ; 0            ;
; Worst-case tpd               ; N/A        ; None                              ; 12.140 ns                        ; USB[15]                       ; DACf[0]                              ;            ;          ; 0            ;
; Worst-case th                ; N/A        ; None                              ; -0.144 ns                        ; ADCsSDO                       ; BS2:ADChandler|Port5[13]             ;            ; Clk      ; 0            ;
; Clock Setup: 'Clk'           ; -15.180 ns ; 100.00 MHz ( period = 10.000 ns ) ; 39.71 MHz ( period = 25.180 ns ) ; BSblock:ChrisBS|FBCtr[1]      ; BSblock:ChrisBS|FeedbackDACOutput[0] ; Clk        ; Clk      ; 1342         ;
; Clock Hold: 'Clk'            ; 0.633 ns   ; 100.00 MHz ( period = 10.000 ns ) ; N/A                              ; BS2:ADChandler|CurrentPort[1] ; BS2:ADChandler|CurrentPort[1]        ; Clk        ; Clk      ; 0            ;
; Total number of failed paths ;            ;                                   ;                                  ;                               ;                                      ;            ;          ; 1342         ;
+------------------------------+------------+-----------------------------------+----------------------------------+-------------------------------+--------------------------------------+------------+----------+--------------+


+-------------------------------------------------------------------------------------------------------+
; Timing Analyzer Settings                                                                              ;
+-------------------------------------------------------+--------------------+------+-----+-------------+
; Option                                                ; Setting            ; From ; To  ; Entity Name ;
+-------------------------------------------------------+--------------------+------+-----+-------------+
; Device Name                                           ; EP1C3T100C6        ;      ;     ;             ;
; Timing Models                                         ; Final              ;      ;     ;             ;
; Number of source nodes to report per destination node ; 10                 ;      ;     ;             ;
; Number of destination nodes to report                 ; 10                 ;      ;     ;             ;
; Number of paths to report                             ; 100                ;      ;     ;             ;
; Report Minimum Timing Checks                          ; Off                ;      ;     ;             ;
; Use Fast Timing Models                                ; Off                ;      ;     ;             ;
; Report IO Paths Separately                            ; Off                ;      ;     ;             ;
; Default hold multicycle                               ; Same as Multicycle ;      ;     ;             ;
; Cut paths between unrelated clock domains             ; On                 ;      ;     ;             ;
; Cut off read during write signal paths                ; On                 ;      ;     ;             ;
; Cut off feedback from I/O pins                        ; On                 ;      ;     ;             ;
; Report Combined Fast/Slow Timing                      ; Off                ;      ;     ;             ;
; Ignore Clock Settings                                 ; Off                ;      ;     ;             ;
; Analyze latches as synchronous elements               ; Off                ;      ;     ;             ;
; Enable Recovery/Removal analysis                      ; Off                ;      ;     ;             ;
; Enable Clock Latency                                  ; Off                ;      ;     ;             ;
; Clock Settings                                        ; Clk                ;      ; Clk ;             ;
+-------------------------------------------------------+--------------------+------+-----+-------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary                                                                                                                                                             ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; Clock Node Name ; Clock Setting Name ; Type     ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ; Phase offset ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; Clk             ; Clk                ; User Pin ; 100.0 MHz        ; 0.000 ns      ; 0.000 ns     ; NONE     ; N/A                   ; N/A                 ; N/A    ;              ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'Clk'                                                                                                                                                                                                                                                           ;
+-----------------------------------------+-----------------------------------------------------+--------------------------+---------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack                                   ; Actual fmax (period)                                ; From                     ; To                                    ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+--------------------------+---------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; -15.180 ns                              ; 39.71 MHz ( period = 25.180 ns )                    ; BSblock:ChrisBS|FBCtr[1] ; BSblock:ChrisBS|FeedbackDACOutput[0]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.950 ns               ;
; -15.179 ns                              ; 39.72 MHz ( period = 25.179 ns )                    ; BSblock:ChrisBS|FBCtr[1] ; BSblock:ChrisBS|FeedbackDACOutput[5]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.949 ns               ;
; -15.173 ns                              ; 39.73 MHz ( period = 25.173 ns )                    ; BSblock:ChrisBS|FBCtr[1] ; BSblock:ChrisBS|FeedbackDACOutput[1]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.943 ns               ;
; -15.173 ns                              ; 39.73 MHz ( period = 25.173 ns )                    ; BSblock:ChrisBS|FBCtr[1] ; BSblock:ChrisBS|FeedbackDACOutput[9]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.943 ns               ;
; -15.115 ns                              ; 39.82 MHz ( period = 25.115 ns )                    ; BSblock:ChrisBS|FBCtr[2] ; BSblock:ChrisBS|FeedbackDACOutput[0]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.885 ns               ;
; -15.114 ns                              ; 39.82 MHz ( period = 25.114 ns )                    ; BSblock:ChrisBS|FBCtr[2] ; BSblock:ChrisBS|FeedbackDACOutput[5]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.884 ns               ;
; -15.108 ns                              ; 39.83 MHz ( period = 25.108 ns )                    ; BSblock:ChrisBS|FBCtr[2] ; BSblock:ChrisBS|FeedbackDACOutput[1]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.878 ns               ;
; -15.108 ns                              ; 39.83 MHz ( period = 25.108 ns )                    ; BSblock:ChrisBS|FBCtr[2] ; BSblock:ChrisBS|FeedbackDACOutput[9]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.878 ns               ;
; -15.101 ns                              ; 39.84 MHz ( period = 25.101 ns )                    ; BSblock:ChrisBS|FBCtr[5] ; BSblock:ChrisBS|FeedbackDACOutput[0]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.871 ns               ;
; -15.100 ns                              ; 39.84 MHz ( period = 25.100 ns )                    ; BSblock:ChrisBS|FBCtr[5] ; BSblock:ChrisBS|FeedbackDACOutput[5]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.870 ns               ;
; -15.094 ns                              ; 39.85 MHz ( period = 25.094 ns )                    ; BSblock:ChrisBS|FBCtr[5] ; BSblock:ChrisBS|FeedbackDACOutput[1]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.864 ns               ;
; -15.094 ns                              ; 39.85 MHz ( period = 25.094 ns )                    ; BSblock:ChrisBS|FBCtr[5] ; BSblock:ChrisBS|FeedbackDACOutput[9]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.864 ns               ;
; -15.091 ns                              ; 39.85 MHz ( period = 25.091 ns )                    ; BSblock:ChrisBS|FBCtr[1] ; BSblock:ChrisBS|FeedbackDACOutput[7]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.861 ns               ;
; -15.089 ns                              ; 39.86 MHz ( period = 25.089 ns )                    ; BSblock:ChrisBS|FBCtr[1] ; BSblock:ChrisBS|FeedbackDACOutput[10] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.859 ns               ;
; -15.085 ns                              ; 39.86 MHz ( period = 25.085 ns )                    ; BSblock:ChrisBS|FBCtr[1] ; BSblock:ChrisBS|FeedbackDACOutput[6]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.855 ns               ;
; -15.084 ns                              ; 39.87 MHz ( period = 25.084 ns )                    ; BSblock:ChrisBS|FBCtr[1] ; BSblock:ChrisBS|FeedbackDACOutput[13] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.854 ns               ;
; -15.083 ns                              ; 39.87 MHz ( period = 25.083 ns )                    ; BSblock:ChrisBS|FBCtr[1] ; BSblock:ChrisBS|FeedbackDACOutput[3]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.853 ns               ;
; -15.083 ns                              ; 39.87 MHz ( period = 25.083 ns )                    ; BSblock:ChrisBS|FBCtr[1] ; BSblock:ChrisBS|FeedbackDACOutput[14] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.853 ns               ;
; -15.066 ns                              ; 39.89 MHz ( period = 25.066 ns )                    ; BSblock:ChrisBS|FBCtr[0] ; BSblock:ChrisBS|FeedbackDACOutput[0]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.836 ns               ;
; -15.065 ns                              ; 39.90 MHz ( period = 25.065 ns )                    ; BSblock:ChrisBS|FBCtr[0] ; BSblock:ChrisBS|FeedbackDACOutput[5]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.835 ns               ;
; -15.059 ns                              ; 39.91 MHz ( period = 25.059 ns )                    ; BSblock:ChrisBS|FBCtr[0] ; BSblock:ChrisBS|FeedbackDACOutput[1]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.829 ns               ;
; -15.059 ns                              ; 39.91 MHz ( period = 25.059 ns )                    ; BSblock:ChrisBS|FBCtr[0] ; BSblock:ChrisBS|FeedbackDACOutput[9]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.829 ns               ;
; -15.051 ns                              ; 39.92 MHz ( period = 25.051 ns )                    ; BSblock:ChrisBS|FBCtr[3] ; BSblock:ChrisBS|FeedbackDACOutput[0]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.821 ns               ;
; -15.050 ns                              ; 39.92 MHz ( period = 25.050 ns )                    ; BSblock:ChrisBS|FBCtr[3] ; BSblock:ChrisBS|FeedbackDACOutput[5]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.820 ns               ;
; -15.046 ns                              ; 39.93 MHz ( period = 25.046 ns )                    ; BSblock:ChrisBS|FBCtr[4] ; BSblock:ChrisBS|FeedbackDACOutput[0]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.816 ns               ;
; -15.045 ns                              ; 39.93 MHz ( period = 25.045 ns )                    ; BSblock:ChrisBS|FBCtr[4] ; BSblock:ChrisBS|FeedbackDACOutput[5]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.815 ns               ;
; -15.044 ns                              ; 39.93 MHz ( period = 25.044 ns )                    ; BSblock:ChrisBS|FBCtr[3] ; BSblock:ChrisBS|FeedbackDACOutput[1]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.814 ns               ;
; -15.044 ns                              ; 39.93 MHz ( period = 25.044 ns )                    ; BSblock:ChrisBS|FBCtr[3] ; BSblock:ChrisBS|FeedbackDACOutput[9]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.814 ns               ;
; -15.041 ns                              ; 39.93 MHz ( period = 25.041 ns )                    ; BSblock:ChrisBS|FBCtr[6] ; BSblock:ChrisBS|FeedbackDACOutput[0]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.811 ns               ;
; -15.040 ns                              ; 39.94 MHz ( period = 25.040 ns )                    ; BSblock:ChrisBS|FBCtr[6] ; BSblock:ChrisBS|FeedbackDACOutput[5]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.810 ns               ;
; -15.039 ns                              ; 39.94 MHz ( period = 25.039 ns )                    ; BSblock:ChrisBS|FBCtr[4] ; BSblock:ChrisBS|FeedbackDACOutput[1]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.809 ns               ;
; -15.039 ns                              ; 39.94 MHz ( period = 25.039 ns )                    ; BSblock:ChrisBS|FBCtr[1] ; BSblock:ChrisBS|FeedbackDACOutput[11] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.809 ns               ;
; -15.039 ns                              ; 39.94 MHz ( period = 25.039 ns )                    ; BSblock:ChrisBS|FBCtr[4] ; BSblock:ChrisBS|FeedbackDACOutput[9]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.809 ns               ;
; -15.036 ns                              ; 39.94 MHz ( period = 25.036 ns )                    ; BSblock:ChrisBS|FBCtr[1] ; BSblock:ChrisBS|FeedbackDACOutput[8]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.806 ns               ;
; -15.034 ns                              ; 39.95 MHz ( period = 25.034 ns )                    ; BSblock:ChrisBS|FBCtr[6] ; BSblock:ChrisBS|FeedbackDACOutput[1]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.804 ns               ;
; -15.034 ns                              ; 39.95 MHz ( period = 25.034 ns )                    ; BSblock:ChrisBS|FBCtr[6] ; BSblock:ChrisBS|FeedbackDACOutput[9]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.804 ns               ;
; -15.033 ns                              ; 39.95 MHz ( period = 25.033 ns )                    ; BSblock:ChrisBS|FBCtr[1] ; BSblock:ChrisBS|FeedbackDACOutput[12] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.803 ns               ;
; -15.032 ns                              ; 39.95 MHz ( period = 25.032 ns )                    ; BSblock:ChrisBS|FBCtr[1] ; BSblock:ChrisBS|FeedbackDACOutput[2]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.802 ns               ;
; -15.026 ns                              ; 39.96 MHz ( period = 25.026 ns )                    ; BSblock:ChrisBS|FBCtr[2] ; BSblock:ChrisBS|FeedbackDACOutput[7]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.796 ns               ;
; -15.024 ns                              ; 39.96 MHz ( period = 25.024 ns )                    ; BSblock:ChrisBS|FBCtr[2] ; BSblock:ChrisBS|FeedbackDACOutput[10] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.794 ns               ;
; -15.020 ns                              ; 39.97 MHz ( period = 25.020 ns )                    ; BSblock:ChrisBS|FBCtr[2] ; BSblock:ChrisBS|FeedbackDACOutput[6]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.790 ns               ;
; -15.019 ns                              ; 39.97 MHz ( period = 25.019 ns )                    ; BSblock:ChrisBS|FBCtr[2] ; BSblock:ChrisBS|FeedbackDACOutput[13] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.789 ns               ;
; -15.018 ns                              ; 39.97 MHz ( period = 25.018 ns )                    ; BSblock:ChrisBS|FBCtr[2] ; BSblock:ChrisBS|FeedbackDACOutput[3]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.788 ns               ;
; -15.018 ns                              ; 39.97 MHz ( period = 25.018 ns )                    ; BSblock:ChrisBS|FBCtr[2] ; BSblock:ChrisBS|FeedbackDACOutput[14] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.788 ns               ;
; -15.012 ns                              ; 39.98 MHz ( period = 25.012 ns )                    ; BSblock:ChrisBS|FBCtr[5] ; BSblock:ChrisBS|FeedbackDACOutput[7]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.782 ns               ;
; -15.010 ns                              ; 39.98 MHz ( period = 25.010 ns )                    ; BSblock:ChrisBS|FBCtr[5] ; BSblock:ChrisBS|FeedbackDACOutput[10] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.780 ns               ;
; -15.006 ns                              ; 39.99 MHz ( period = 25.006 ns )                    ; BSblock:ChrisBS|FBCtr[5] ; BSblock:ChrisBS|FeedbackDACOutput[6]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.776 ns               ;
; -15.005 ns                              ; 39.99 MHz ( period = 25.005 ns )                    ; BSblock:ChrisBS|FBCtr[5] ; BSblock:ChrisBS|FeedbackDACOutput[13] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.775 ns               ;
; -15.004 ns                              ; 39.99 MHz ( period = 25.004 ns )                    ; BSblock:ChrisBS|FBCtr[5] ; BSblock:ChrisBS|FeedbackDACOutput[3]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.774 ns               ;
; -15.004 ns                              ; 39.99 MHz ( period = 25.004 ns )                    ; BSblock:ChrisBS|FBCtr[5] ; BSblock:ChrisBS|FeedbackDACOutput[14] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.774 ns               ;
; -14.977 ns                              ; 40.04 MHz ( period = 24.977 ns )                    ; BSblock:ChrisBS|FBCtr[0] ; BSblock:ChrisBS|FeedbackDACOutput[7]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.747 ns               ;
; -14.975 ns                              ; 40.04 MHz ( period = 24.975 ns )                    ; BSblock:ChrisBS|FBCtr[0] ; BSblock:ChrisBS|FeedbackDACOutput[10] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.745 ns               ;
; -14.974 ns                              ; 40.04 MHz ( period = 24.974 ns )                    ; BSblock:ChrisBS|FBCtr[2] ; BSblock:ChrisBS|FeedbackDACOutput[11] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.744 ns               ;
; -14.971 ns                              ; 40.05 MHz ( period = 24.971 ns )                    ; BSblock:ChrisBS|FBCtr[0] ; BSblock:ChrisBS|FeedbackDACOutput[6]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.741 ns               ;
; -14.971 ns                              ; 40.05 MHz ( period = 24.971 ns )                    ; BSblock:ChrisBS|FBCtr[2] ; BSblock:ChrisBS|FeedbackDACOutput[8]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.741 ns               ;
; -14.970 ns                              ; 40.05 MHz ( period = 24.970 ns )                    ; BSblock:ChrisBS|FBCtr[0] ; BSblock:ChrisBS|FeedbackDACOutput[13] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.740 ns               ;
; -14.969 ns                              ; 40.05 MHz ( period = 24.969 ns )                    ; BSblock:ChrisBS|FBCtr[0] ; BSblock:ChrisBS|FeedbackDACOutput[3]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.739 ns               ;
; -14.969 ns                              ; 40.05 MHz ( period = 24.969 ns )                    ; BSblock:ChrisBS|FBCtr[0] ; BSblock:ChrisBS|FeedbackDACOutput[14] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.739 ns               ;
; -14.968 ns                              ; 40.05 MHz ( period = 24.968 ns )                    ; BSblock:ChrisBS|FBCtr[2] ; BSblock:ChrisBS|FeedbackDACOutput[12] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.738 ns               ;
; -14.967 ns                              ; 40.05 MHz ( period = 24.967 ns )                    ; BSblock:ChrisBS|FBCtr[2] ; BSblock:ChrisBS|FeedbackDACOutput[2]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.737 ns               ;
; -14.962 ns                              ; 40.06 MHz ( period = 24.962 ns )                    ; BSblock:ChrisBS|FBCtr[3] ; BSblock:ChrisBS|FeedbackDACOutput[7]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.732 ns               ;
; -14.960 ns                              ; 40.06 MHz ( period = 24.960 ns )                    ; BSblock:ChrisBS|FBCtr[3] ; BSblock:ChrisBS|FeedbackDACOutput[10] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.730 ns               ;
; -14.960 ns                              ; 40.06 MHz ( period = 24.960 ns )                    ; BSblock:ChrisBS|FBCtr[5] ; BSblock:ChrisBS|FeedbackDACOutput[11] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.730 ns               ;
; -14.957 ns                              ; 40.07 MHz ( period = 24.957 ns )                    ; BSblock:ChrisBS|FBCtr[4] ; BSblock:ChrisBS|FeedbackDACOutput[7]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.727 ns               ;
; -14.957 ns                              ; 40.07 MHz ( period = 24.957 ns )                    ; BSblock:ChrisBS|FBCtr[5] ; BSblock:ChrisBS|FeedbackDACOutput[8]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.727 ns               ;
; -14.956 ns                              ; 40.07 MHz ( period = 24.956 ns )                    ; BSblock:ChrisBS|FBCtr[3] ; BSblock:ChrisBS|FeedbackDACOutput[6]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.726 ns               ;
; -14.955 ns                              ; 40.07 MHz ( period = 24.955 ns )                    ; BSblock:ChrisBS|FBCtr[4] ; BSblock:ChrisBS|FeedbackDACOutput[10] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.725 ns               ;
; -14.955 ns                              ; 40.07 MHz ( period = 24.955 ns )                    ; BSblock:ChrisBS|FBCtr[3] ; BSblock:ChrisBS|FeedbackDACOutput[13] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.725 ns               ;
; -14.954 ns                              ; 40.07 MHz ( period = 24.954 ns )                    ; BSblock:ChrisBS|FBCtr[3] ; BSblock:ChrisBS|FeedbackDACOutput[3]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.724 ns               ;
; -14.954 ns                              ; 40.07 MHz ( period = 24.954 ns )                    ; BSblock:ChrisBS|FBCtr[3] ; BSblock:ChrisBS|FeedbackDACOutput[14] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.724 ns               ;
; -14.954 ns                              ; 40.07 MHz ( period = 24.954 ns )                    ; BSblock:ChrisBS|FBCtr[5] ; BSblock:ChrisBS|FeedbackDACOutput[12] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.724 ns               ;
; -14.953 ns                              ; 40.08 MHz ( period = 24.953 ns )                    ; BSblock:ChrisBS|FBCtr[5] ; BSblock:ChrisBS|FeedbackDACOutput[2]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.723 ns               ;
; -14.952 ns                              ; 40.08 MHz ( period = 24.952 ns )                    ; BSblock:ChrisBS|FBCtr[6] ; BSblock:ChrisBS|FeedbackDACOutput[7]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.722 ns               ;
; -14.951 ns                              ; 40.08 MHz ( period = 24.951 ns )                    ; BSblock:ChrisBS|FBCtr[4] ; BSblock:ChrisBS|FeedbackDACOutput[6]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.721 ns               ;
; -14.950 ns                              ; 40.08 MHz ( period = 24.950 ns )                    ; BSblock:ChrisBS|FBCtr[6] ; BSblock:ChrisBS|FeedbackDACOutput[10] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.720 ns               ;
; -14.950 ns                              ; 40.08 MHz ( period = 24.950 ns )                    ; BSblock:ChrisBS|FBCtr[4] ; BSblock:ChrisBS|FeedbackDACOutput[13] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.720 ns               ;
; -14.949 ns                              ; 40.08 MHz ( period = 24.949 ns )                    ; BSblock:ChrisBS|FBCtr[4] ; BSblock:ChrisBS|FeedbackDACOutput[3]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.719 ns               ;
; -14.949 ns                              ; 40.08 MHz ( period = 24.949 ns )                    ; BSblock:ChrisBS|FBCtr[4] ; BSblock:ChrisBS|FeedbackDACOutput[14] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.719 ns               ;
; -14.946 ns                              ; 40.09 MHz ( period = 24.946 ns )                    ; BSblock:ChrisBS|FBCtr[6] ; BSblock:ChrisBS|FeedbackDACOutput[6]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.716 ns               ;
; -14.945 ns                              ; 40.09 MHz ( period = 24.945 ns )                    ; BSblock:ChrisBS|FBCtr[6] ; BSblock:ChrisBS|FeedbackDACOutput[13] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.715 ns               ;
; -14.944 ns                              ; 40.09 MHz ( period = 24.944 ns )                    ; BSblock:ChrisBS|FBCtr[6] ; BSblock:ChrisBS|FeedbackDACOutput[3]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.714 ns               ;
; -14.944 ns                              ; 40.09 MHz ( period = 24.944 ns )                    ; BSblock:ChrisBS|FBCtr[6] ; BSblock:ChrisBS|FeedbackDACOutput[14] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.714 ns               ;
; -14.925 ns                              ; 40.12 MHz ( period = 24.925 ns )                    ; BSblock:ChrisBS|FBCtr[0] ; BSblock:ChrisBS|FeedbackDACOutput[11] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.695 ns               ;
; -14.922 ns                              ; 40.13 MHz ( period = 24.922 ns )                    ; BSblock:ChrisBS|FBCtr[0] ; BSblock:ChrisBS|FeedbackDACOutput[8]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.692 ns               ;
; -14.919 ns                              ; 40.13 MHz ( period = 24.919 ns )                    ; BSblock:ChrisBS|FBCtr[0] ; BSblock:ChrisBS|FeedbackDACOutput[12] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.689 ns               ;
; -14.918 ns                              ; 40.13 MHz ( period = 24.918 ns )                    ; BSblock:ChrisBS|FBCtr[0] ; BSblock:ChrisBS|FeedbackDACOutput[2]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.688 ns               ;
; -14.910 ns                              ; 40.14 MHz ( period = 24.910 ns )                    ; BSblock:ChrisBS|FBCtr[3] ; BSblock:ChrisBS|FeedbackDACOutput[11] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.680 ns               ;
; -14.907 ns                              ; 40.15 MHz ( period = 24.907 ns )                    ; BSblock:ChrisBS|FBCtr[3] ; BSblock:ChrisBS|FeedbackDACOutput[8]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.677 ns               ;
; -14.905 ns                              ; 40.15 MHz ( period = 24.905 ns )                    ; BSblock:ChrisBS|FBCtr[4] ; BSblock:ChrisBS|FeedbackDACOutput[11] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.675 ns               ;
; -14.904 ns                              ; 40.15 MHz ( period = 24.904 ns )                    ; BSblock:ChrisBS|FBCtr[3] ; BSblock:ChrisBS|FeedbackDACOutput[12] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.674 ns               ;
; -14.903 ns                              ; 40.16 MHz ( period = 24.903 ns )                    ; BSblock:ChrisBS|FBCtr[3] ; BSblock:ChrisBS|FeedbackDACOutput[2]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.673 ns               ;
; -14.902 ns                              ; 40.16 MHz ( period = 24.902 ns )                    ; BSblock:ChrisBS|FBCtr[4] ; BSblock:ChrisBS|FeedbackDACOutput[8]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.672 ns               ;
; -14.900 ns                              ; 40.16 MHz ( period = 24.900 ns )                    ; BSblock:ChrisBS|FBCtr[6] ; BSblock:ChrisBS|FeedbackDACOutput[11] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.670 ns               ;
; -14.899 ns                              ; 40.16 MHz ( period = 24.899 ns )                    ; BSblock:ChrisBS|FBCtr[4] ; BSblock:ChrisBS|FeedbackDACOutput[12] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.669 ns               ;
; -14.898 ns                              ; 40.16 MHz ( period = 24.898 ns )                    ; BSblock:ChrisBS|FBCtr[4] ; BSblock:ChrisBS|FeedbackDACOutput[2]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.668 ns               ;
; -14.897 ns                              ; 40.17 MHz ( period = 24.897 ns )                    ; BSblock:ChrisBS|FBCtr[6] ; BSblock:ChrisBS|FeedbackDACOutput[8]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.667 ns               ;
; -14.894 ns                              ; 40.17 MHz ( period = 24.894 ns )                    ; BSblock:ChrisBS|FBCtr[6] ; BSblock:ChrisBS|FeedbackDACOutput[12] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.664 ns               ;
; -14.893 ns                              ; 40.17 MHz ( period = 24.893 ns )                    ; BSblock:ChrisBS|FBCtr[6] ; BSblock:ChrisBS|FeedbackDACOutput[2]  ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.663 ns               ;
; -14.658 ns                              ; 40.55 MHz ( period = 24.658 ns )                    ; BSblock:ChrisBS|FBCtr[1] ; BSblock:ChrisBS|FeedbackDACOutput[15] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.428 ns               ;
; -14.593 ns                              ; 40.66 MHz ( period = 24.593 ns )                    ; BSblock:ChrisBS|FBCtr[2] ; BSblock:ChrisBS|FeedbackDACOutput[15] ; Clk        ; Clk      ; 10.000 ns                   ; 9.770 ns                  ; 24.363 ns               ;
; Timing analysis restricted to 100 rows. ; To change the limit use Settings (Assignments menu) ;                          ;                                       ;            ;          ;                             ;                           ;                         ;
+-----------------------------------------+-----------------------------------------------------+--------------------------+---------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Hold: 'Clk'                                                                                                                                                                                                                                                                                                              ;
+-----------------------------------------+-----------------------------------------------------+-------------------------------------------------------------------------------------------------------------------+------------+----------+----------------------------+----------------------------+--------------------------+
; Minimum Slack                           ; From                                                ; To                                                                                                                ; From Clock ; To Clock ; Required Hold Relationship ; Required Shortest P2P Time ; Actual Shortest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+-------------------------------------------------------------------------------------------------------------------+------------+----------+----------------------------+----------------------------+--------------------------+
; 0.633 ns                                ; BS2:ADChandler|CurrentPort[1]                       ; BS2:ADChandler|CurrentPort[1]                                                                                     ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 0.472 ns                 ;
; 0.633 ns                                ; BS2:ADChandler|CurrentPort[0]                       ; BS2:ADChandler|CurrentPort[0]                                                                                     ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 0.472 ns                 ;
; 0.633 ns                                ; BS2:ADChandler|CurrentPort[2]                       ; BS2:ADChandler|CurrentPort[2]                                                                                     ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 0.472 ns                 ;
; 0.801 ns                                ; BS2:ADChandler|ADCsCS                               ; BS2:ADChandler|ADCsCS                                                                                             ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 0.640 ns                 ;
; 0.941 ns                                ; BSblock:ChrisBS|ADCClk                              ; BSblock:ChrisBS|ADCClk                                                                                            ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 0.780 ns                 ;
; 1.015 ns                                ; BS2:ADChandler|Ct[1]                                ; BS2:ADChandler|Ct[1]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 0.854 ns                 ;
; 1.034 ns                                ; BS2:ADChandler|Ct[6]                                ; BS2:ADChandler|Ct[6]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 0.873 ns                 ;
; 1.140 ns                                ; BS2:ADChandler|Ct[8]                                ; BS2:ADChandler|Ct[8]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 0.979 ns                 ;
; 1.140 ns                                ; BS2:ADChandler|Ct[7]                                ; BS2:ADChandler|Ct[7]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 0.979 ns                 ;
; 1.143 ns                                ; BS2:ADChandler|Ct[5]                                ; BS2:ADChandler|Ct[5]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 0.982 ns                 ;
; 1.147 ns                                ; BS2:ADChandler|Ct[3]                                ; BS2:ADChandler|Ct[3]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 0.986 ns                 ;
; 1.147 ns                                ; BS2:ADChandler|Ct[2]                                ; BS2:ADChandler|Ct[2]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 0.986 ns                 ;
; 1.364 ns                                ; BS2:ADChandler|Ct[4]                                ; BS2:ADChandler|Ct[4]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.203 ns                 ;
; 1.402 ns                                ; BS2:ADChandler|ADCsClk                              ; BS2:ADChandler|ADCsClk                                                                                            ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.241 ns                 ;
; 1.451 ns                                ; BSblock:ChrisBS|FBCtr[0]                            ; BSblock:ChrisBS|FBCtr[0]                                                                                          ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.290 ns                 ;
; 1.474 ns                                ; BSblock:ChrisBS|LUTupdate[7]                        ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|ram_block1a8~porta_datain_reg1  ; Clk        ; Clk      ; 0.000 ns                   ; -0.121 ns                  ; 1.353 ns                 ;
; 1.476 ns                                ; BSblock:ChrisBS|LUTupdate[3]                        ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|ram_block1a9~porta_datain_reg1  ; Clk        ; Clk      ; 0.000 ns                   ; -0.121 ns                  ; 1.355 ns                 ;
; 1.477 ns                                ; BS2:ADChandler|Ct[1]                                ; BS2:ADChandler|Ct[2]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.316 ns                 ;
; 1.478 ns                                ; BSSlow:inst|Ctr[8]                                  ; BSSlow:inst|Ctr[8]                                                                                                ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.317 ns                 ;
; 1.484 ns                                ; BSblock:ChrisBS|LUTupdate[9]                        ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|ram_block1a9~porta_datain_reg0  ; Clk        ; Clk      ; 0.000 ns                   ; -0.121 ns                  ; 1.363 ns                 ;
; 1.488 ns                                ; BSblock:ChrisBS|LUTupdate[8]                        ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|ram_block1a8~porta_datain_reg0  ; Clk        ; Clk      ; 0.000 ns                   ; -0.121 ns                  ; 1.367 ns                 ;
; 1.493 ns                                ; BSblock:ChrisBS|LUTupdate[1]                        ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|ram_block1a10~porta_datain_reg1 ; Clk        ; Clk      ; 0.000 ns                   ; -0.121 ns                  ; 1.372 ns                 ;
; 1.496 ns                                ; BS2:ADChandler|Ct[6]                                ; BS2:ADChandler|Ct[7]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.335 ns                 ;
; 1.497 ns                                ; BSblock:ChrisBS|LUTupdate[10]                       ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|ram_block1a10~porta_datain_reg0 ; Clk        ; Clk      ; 0.000 ns                   ; -0.121 ns                  ; 1.376 ns                 ;
; 1.526 ns                                ; BSSlow:inst|Ctr[11]                                 ; BSSlow:inst|Ctr[0]                                                                                                ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.365 ns                 ;
; 1.537 ns                                ; BS2:ADChandler|Ct[1]                                ; BS2:ADChandler|Ct[3]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.376 ns                 ;
; 1.556 ns                                ; BS2:ADChandler|Ct[6]                                ; BS2:ADChandler|Ct[8]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.395 ns                 ;
; 1.580 ns                                ; BSblock:ChrisBS|FBCtr[7]                            ; BSblock:ChrisBS|FBCtr[7]                                                                                          ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.419 ns                 ;
; 1.597 ns                                ; BS2:ADChandler|Ct[1]                                ; BS2:ADChandler|Ct[4]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.436 ns                 ;
; 1.609 ns                                ; BS2:ADChandler|Ct[8]                                ; BS2:ADChandler|Ct[9]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.448 ns                 ;
; 1.609 ns                                ; BS2:ADChandler|Ct[7]                                ; BS2:ADChandler|Ct[8]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.448 ns                 ;
; 1.613 ns                                ; BSSlow:inst|DACsSync                                ; BSSlow:inst|DACsSync                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.452 ns                 ;
; 1.616 ns                                ; BS2:ADChandler|Ct[2]                                ; BS2:ADChandler|Ct[3]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.455 ns                 ;
; 1.616 ns                                ; BS2:ADChandler|Ct[3]                                ; BS2:ADChandler|Ct[4]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.455 ns                 ;
; 1.616 ns                                ; BS2:ADChandler|Ct[6]                                ; BS2:ADChandler|Ct[9]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.455 ns                 ;
; 1.657 ns                                ; BS2:ADChandler|Ct[1]                                ; BS2:ADChandler|Ct[5]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.496 ns                 ;
; 1.669 ns                                ; BS2:ADChandler|Ct[7]                                ; BS2:ADChandler|Ct[9]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.508 ns                 ;
; 1.669 ns                                ; BS2:ADChandler|Ct[8]                                ; BS2:ADChandler|Ct[10]                                                                                             ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.508 ns                 ;
; 1.676 ns                                ; BS2:ADChandler|Ct[2]                                ; BS2:ADChandler|Ct[4]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.515 ns                 ;
; 1.676 ns                                ; BS2:ADChandler|Ct[3]                                ; BS2:ADChandler|Ct[5]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.515 ns                 ;
; 1.676 ns                                ; BS2:ADChandler|Ct[6]                                ; BS2:ADChandler|Ct[10]                                                                                             ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.515 ns                 ;
; 1.686 ns                                ; BSblock:ChrisBS|FBCtr[3]                            ; BSblock:ChrisBS|FBCtr[3]                                                                                          ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.525 ns                 ;
; 1.724 ns                                ; BSblock:ChrisBS|ADCTrigger                          ; BSblock:ChrisBS|ADCTrigger                                                                                        ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.563 ns                 ;
; 1.729 ns                                ; BS2:ADChandler|Ct[7]                                ; BS2:ADChandler|Ct[10]                                                                                             ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.568 ns                 ;
; 1.733 ns                                ; BSSlow:inst|Ctr[1]                                  ; BSSlow:inst|Ctr[1]                                                                                                ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.572 ns                 ;
; 1.736 ns                                ; BS2:ADChandler|Ct[2]                                ; BS2:ADChandler|Ct[5]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.575 ns                 ;
; 1.789 ns                                ; BS2:ADChandler|ADCsSDI                              ; BS2:ADChandler|ADCsSDI                                                                                            ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.628 ns                 ;
; 1.793 ns                                ; BSblock:ChrisBS|LUTwr                               ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|ram_block1a9~porta_we_reg       ; Clk        ; Clk      ; 0.000 ns                   ; -0.111 ns                  ; 1.682 ns                 ;
; 1.795 ns                                ; BSblock:ChrisBS|LUTupdate[6]                        ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|ram_block1a6~porta_datain_reg0  ; Clk        ; Clk      ; 0.000 ns                   ; -0.121 ns                  ; 1.674 ns                 ;
; 1.799 ns                                ; BSblock:ChrisBS|FeedbackDACOutput[0]                ; BSblock:ChrisBS|FeedbackDACOutput[0]                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.638 ns                 ;
; 1.799 ns                                ; BSblock:ChrisBS|FeedbackDACOutput[7]                ; BSblock:ChrisBS|FeedbackDACOutput[7]                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.638 ns                 ;
; 1.802 ns                                ; BSblock:ChrisBS|FeedbackDACOutput[13]               ; BSblock:ChrisBS|FeedbackDACOutput[13]                                                                             ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.641 ns                 ;
; 1.806 ns                                ; BSblock:ChrisBS|LUTupdate[0]                        ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|ram_block1a5~porta_datain_reg1  ; Clk        ; Clk      ; 0.000 ns                   ; -0.121 ns                  ; 1.685 ns                 ;
; 1.811 ns                                ; BS2:ADChandler|CurrentPort[0]                       ; BS2:ADChandler|CurrentPort[1]                                                                                     ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.650 ns                 ;
; 1.815 ns                                ; BSblock:ChrisBS|LUTupdate[11]                       ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|ram_block1a11~porta_datain_reg0 ; Clk        ; Clk      ; 0.000 ns                   ; -0.121 ns                  ; 1.694 ns                 ;
; 1.815 ns                                ; BSblock:ChrisBS|LUTupdate[2]                        ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|ram_block1a11~porta_datain_reg1 ; Clk        ; Clk      ; 0.000 ns                   ; -0.121 ns                  ; 1.694 ns                 ;
; 1.827 ns                                ; BSblock:ChrisBS|LUTupdate[5]                        ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|ram_block1a5~porta_datain_reg0  ; Clk        ; Clk      ; 0.000 ns                   ; -0.121 ns                  ; 1.706 ns                 ;
; 1.828 ns                                ; BSblock:ChrisBS|FBCtr[5]                            ; BSblock:ChrisBS|FBCtr[5]                                                                                          ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.667 ns                 ;
; 1.833 ns                                ; BS2:ADChandler|Ct[4]                                ; BS2:ADChandler|Ct[5]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.672 ns                 ;
; 1.835 ns                                ; BSblock:ChrisBS|LUTupdate[4]                        ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|ram_block1a6~porta_datain_reg1  ; Clk        ; Clk      ; 0.000 ns                   ; -0.121 ns                  ; 1.714 ns                 ;
; 1.836 ns                                ; BSblock:ChrisBS|FBCtr[4]                            ; BSblock:ChrisBS|FBCtr[4]                                                                                          ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.675 ns                 ;
; 1.844 ns                                ; BS2:ADChandler|Ct[8]                                ; BS2:ADChandler|Ct[11]                                                                                             ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.683 ns                 ;
; 1.848 ns                                ; BSblock:ChrisBS|FBCtr[1]                            ; BSblock:ChrisBS|FBCtr[1]                                                                                          ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.687 ns                 ;
; 1.853 ns                                ; BSblock:ChrisBS|Ptr[2]                              ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|ram_block1a9~porta_address_reg2 ; Clk        ; Clk      ; 0.000 ns                   ; -0.111 ns                  ; 1.742 ns                 ;
; 1.853 ns                                ; BS2:ADChandler|Ct[6]                                ; BS2:ADChandler|Ct[11]                                                                                             ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.692 ns                 ;
; 1.906 ns                                ; BS2:ADChandler|Ct[7]                                ; BS2:ADChandler|Ct[11]                                                                                             ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.745 ns                 ;
; 1.911 ns                                ; BS2:ADChandler|Ct[5]                                ; BS2:ADChandler|Ct[9]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.750 ns                 ;
; 1.911 ns                                ; BS2:ADChandler|Ct[5]                                ; BS2:ADChandler|Ct[8]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.750 ns                 ;
; 1.911 ns                                ; BS2:ADChandler|Ct[5]                                ; BS2:ADChandler|Ct[7]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.750 ns                 ;
; 1.911 ns                                ; BS2:ADChandler|Ct[5]                                ; BS2:ADChandler|Ct[6]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.750 ns                 ;
; 1.911 ns                                ; BS2:ADChandler|Ct[5]                                ; BS2:ADChandler|Ct[10]                                                                                             ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.750 ns                 ;
; 1.931 ns                                ; BSSlow:inst|Ctr[0]                                  ; BSSlow:inst|Ctr[0]                                                                                                ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.770 ns                 ;
; 1.933 ns                                ; BSblock:ChrisBS|FeedbackDACOutput[5]                ; BSblock:ChrisBS|FeedbackDACOutput[5]                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.772 ns                 ;
; 1.933 ns                                ; BSblock:ChrisBS|FeedbackDACOutput[10]               ; BSblock:ChrisBS|FeedbackDACOutput[10]                                                                             ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.772 ns                 ;
; 1.954 ns                                ; BS2:ADChandler|Ct[1]                                ; BS2:ADChandler|Ct[9]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.793 ns                 ;
; 1.954 ns                                ; BS2:ADChandler|Ct[1]                                ; BS2:ADChandler|Ct[8]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.793 ns                 ;
; 1.954 ns                                ; BS2:ADChandler|Ct[1]                                ; BS2:ADChandler|Ct[7]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.793 ns                 ;
; 1.954 ns                                ; BS2:ADChandler|Ct[1]                                ; BS2:ADChandler|Ct[6]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.793 ns                 ;
; 1.954 ns                                ; BS2:ADChandler|Ct[1]                                ; BS2:ADChandler|Ct[10]                                                                                             ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.793 ns                 ;
; 1.971 ns                                ; BS2:ADChandler|Ct[5]                                ; BS2:ADChandler|Ct[11]                                                                                             ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.810 ns                 ;
; 1.973 ns                                ; BS2:ADChandler|Ct[3]                                ; BS2:ADChandler|Ct[9]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.812 ns                 ;
; 1.973 ns                                ; BS2:ADChandler|Ct[3]                                ; BS2:ADChandler|Ct[8]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.812 ns                 ;
; 1.973 ns                                ; BS2:ADChandler|Ct[3]                                ; BS2:ADChandler|Ct[7]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.812 ns                 ;
; 1.973 ns                                ; BS2:ADChandler|Ct[3]                                ; BS2:ADChandler|Ct[6]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.812 ns                 ;
; 1.973 ns                                ; BS2:ADChandler|Ct[3]                                ; BS2:ADChandler|Ct[10]                                                                                             ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.812 ns                 ;
; 2.002 ns                                ; BSSlow:inst|Ctr[4]                                  ; BSSlow:inst|Ctr[4]                                                                                                ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.841 ns                 ;
; 2.003 ns                                ; BSblock:ChrisBS|FBCtr[2]                            ; BSblock:ChrisBS|FBCtr[2]                                                                                          ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.842 ns                 ;
; 2.012 ns                                ; BSblock:ChrisBS|FeedbackDACOutput[15]               ; BSblock:ChrisBS|FeedbackDACOutput[15]                                                                             ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.851 ns                 ;
; 2.014 ns                                ; BS2:ADChandler|Ct[1]                                ; BS2:ADChandler|Ct[11]                                                                                             ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.853 ns                 ;
; 2.033 ns                                ; BS2:ADChandler|Ct[2]                                ; BS2:ADChandler|Ct[9]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.872 ns                 ;
; 2.033 ns                                ; BS2:ADChandler|Ct[2]                                ; BS2:ADChandler|Ct[8]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.872 ns                 ;
; 2.033 ns                                ; BS2:ADChandler|Ct[2]                                ; BS2:ADChandler|Ct[7]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.872 ns                 ;
; 2.033 ns                                ; BS2:ADChandler|Ct[2]                                ; BS2:ADChandler|Ct[6]                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.872 ns                 ;
; 2.033 ns                                ; BS2:ADChandler|Ct[2]                                ; BS2:ADChandler|Ct[10]                                                                                             ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.872 ns                 ;
; 2.033 ns                                ; BS2:ADChandler|Ct[3]                                ; BS2:ADChandler|Ct[11]                                                                                             ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.872 ns                 ;
; 2.056 ns                                ; BSSlow:inst|Ctr[3]                                  ; BSSlow:inst|Ctr[3]                                                                                                ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.895 ns                 ;
; 2.092 ns                                ; BSblock:ChrisBS|FBCtr[0]                            ; BSblock:ChrisBS|FBCtr[3]                                                                                          ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.931 ns                 ;
; 2.093 ns                                ; BS2:ADChandler|Ct[2]                                ; BS2:ADChandler|Ct[11]                                                                                             ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.932 ns                 ;
; 2.099 ns                                ; BSblock:ChrisBS|FeedbackDACOutput[12]               ; BSblock:ChrisBS|FeedbackDACOutput[12]                                                                             ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.938 ns                 ;
; 2.100 ns                                ; BSSlow:inst|DACsData                                ; BSSlow:inst|DACsData                                                                                              ; Clk        ; Clk      ; 0.000 ns                   ; -0.161 ns                  ; 1.939 ns                 ;
; Timing analysis restricted to 100 rows. ; To change the limit use Settings (Assignments menu) ;                                                                                                                   ;            ;          ;                            ;                            ;                          ;
+-----------------------------------------+-----------------------------------------------------+-------------------------------------------------------------------------------------------------------------------+------------+----------+----------------------------+----------------------------+--------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; tsu                                                                                                                                                                                                                                                  ;
+-----------------------------------------+-----------------------------------------------------+------------+---------+--------------------------------------------------------------------------------------------------------------------+----------+
; Slack                                   ; Required tsu                                        ; Actual tsu ; From    ; To                                                                                                                 ; To Clock ;
+-----------------------------------------+-----------------------------------------------------+------------+---------+--------------------------------------------------------------------------------------------------------------------+----------+
; N/A                                     ; None                                                ; 8.806 ns   ; USB[15] ; BSSlow:inst|DACsData                                                                                               ; Clk      ;
; N/A                                     ; None                                                ; 8.653 ns   ; USB[8]  ; BSblock:ChrisBS|DataOut[5]                                                                                         ; Clk      ;
; N/A                                     ; None                                                ; 8.555 ns   ; USB[9]  ; BSblock:ChrisBS|DataOut[5]                                                                                         ; Clk      ;
; N/A                                     ; None                                                ; 8.552 ns   ; USB[12] ; BSSlow:inst|DACsData                                                                                               ; Clk      ;
; N/A                                     ; None                                                ; 8.512 ns   ; USB[14] ; BSSlow:inst|DACsData                                                                                               ; Clk      ;
; N/A                                     ; None                                                ; 8.465 ns   ; USB[8]  ; BSblock:ChrisBS|DataOut[3]                                                                                         ; Clk      ;
; N/A                                     ; None                                                ; 8.433 ns   ; USB[9]  ; BSblock:ChrisBS|DataOut[2]                                                                                         ; Clk      ;
; N/A                                     ; None                                                ; 8.424 ns   ; USB[9]  ; BSblock:ChrisBS|DataOut[4]                                                                                         ; Clk      ;
; N/A                                     ; None                                                ; 8.367 ns   ; USB[9]  ; BSblock:ChrisBS|DataOut[7]                                                                                         ; Clk      ;
; N/A                                     ; None                                                ; 8.367 ns   ; USB[13] ; BSSlow:inst|DACsData                                                                                               ; Clk      ;
; N/A                                     ; None                                                ; 8.360 ns   ; USB[15] ; BSblock:ChrisBS|FBCtr[0]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 8.350 ns   ; USB[15] ; BSblock:ChrisBS|FBCtr[1]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 8.350 ns   ; USB[15] ; BSblock:ChrisBS|FBCtr[2]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 8.350 ns   ; USB[15] ; BSblock:ChrisBS|FBCtr[3]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 8.350 ns   ; USB[15] ; BSblock:ChrisBS|FBCtr[4]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 8.350 ns   ; USB[15] ; BSblock:ChrisBS|FBCtr[5]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 8.350 ns   ; USB[15] ; BSblock:ChrisBS|FBCtr[7]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 8.350 ns   ; USB[15] ; BSblock:ChrisBS|FBCtr[6]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 8.342 ns   ; USB[15] ; BSblock:ChrisBS|FeedbackDACOutput[2]                                                                               ; Clk      ;
; N/A                                     ; None                                                ; 8.342 ns   ; USB[15] ; BSblock:ChrisBS|FeedbackDACOutput[12]                                                                              ; Clk      ;
; N/A                                     ; None                                                ; 8.332 ns   ; USB[15] ; BSblock:ChrisBS|FeedbackDACOutput[11]                                                                              ; Clk      ;
; N/A                                     ; None                                                ; 8.320 ns   ; USB[15] ; BSblock:ChrisBS|FeedbackDACOutput[8]                                                                               ; Clk      ;
; N/A                                     ; None                                                ; 8.317 ns   ; USB[15] ; BSblock:ChrisBS|FeedbackDACOutput[15]                                                                              ; Clk      ;
; N/A                                     ; None                                                ; 8.317 ns   ; USB[15] ; BSblock:ChrisBS|FeedbackDACOutput[7]                                                                               ; Clk      ;
; N/A                                     ; None                                                ; 8.317 ns   ; USB[15] ; BSblock:ChrisBS|FeedbackDACOutput[10]                                                                              ; Clk      ;
; N/A                                     ; None                                                ; 8.187 ns   ; USB[15] ; BSblock:ChrisBS|Setpoint[2]                                                                                        ; Clk      ;
; N/A                                     ; None                                                ; 8.187 ns   ; USB[15] ; BSblock:ChrisBS|Setpoint[6]                                                                                        ; Clk      ;
; N/A                                     ; None                                                ; 8.184 ns   ; USB[15] ; BSblock:ChrisBS|FeedbackStep[15]                                                                                   ; Clk      ;
; N/A                                     ; None                                                ; 8.184 ns   ; USB[15] ; BSblock:ChrisBS|FeedbackStep[8]                                                                                    ; Clk      ;
; N/A                                     ; None                                                ; 8.184 ns   ; USB[15] ; BSblock:ChrisBS|FeedbackStep[9]                                                                                    ; Clk      ;
; N/A                                     ; None                                                ; 8.184 ns   ; USB[15] ; BSblock:ChrisBS|FeedbackStep[10]                                                                                   ; Clk      ;
; N/A                                     ; None                                                ; 8.184 ns   ; USB[15] ; BSblock:ChrisBS|FeedbackStep[11]                                                                                   ; Clk      ;
; N/A                                     ; None                                                ; 8.184 ns   ; USB[15] ; BSblock:ChrisBS|FeedbackStep[12]                                                                                   ; Clk      ;
; N/A                                     ; None                                                ; 8.184 ns   ; USB[15] ; BSblock:ChrisBS|FeedbackStep[13]                                                                                   ; Clk      ;
; N/A                                     ; None                                                ; 8.184 ns   ; USB[15] ; BSblock:ChrisBS|FeedbackStep[14]                                                                                   ; Clk      ;
; N/A                                     ; None                                                ; 8.108 ns   ; USB[15] ; BSblock:ChrisBS|FeedbackDACOutput[4]                                                                               ; Clk      ;
; N/A                                     ; None                                                ; 8.106 ns   ; USB[12] ; BSblock:ChrisBS|FBCtr[0]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 8.096 ns   ; USB[12] ; BSblock:ChrisBS|FBCtr[1]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 8.096 ns   ; USB[12] ; BSblock:ChrisBS|FBCtr[2]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 8.096 ns   ; USB[12] ; BSblock:ChrisBS|FBCtr[3]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 8.096 ns   ; USB[12] ; BSblock:ChrisBS|FBCtr[4]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 8.096 ns   ; USB[12] ; BSblock:ChrisBS|FBCtr[5]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 8.096 ns   ; USB[12] ; BSblock:ChrisBS|FBCtr[7]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 8.096 ns   ; USB[12] ; BSblock:ChrisBS|FBCtr[6]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 8.089 ns   ; USB[15] ; BSblock:ChrisBS|FeedbackDACOutput[3]                                                                               ; Clk      ;
; N/A                                     ; None                                                ; 8.089 ns   ; USB[15] ; BSblock:ChrisBS|FeedbackDACOutput[14]                                                                              ; Clk      ;
; N/A                                     ; None                                                ; 8.089 ns   ; USB[15] ; BSblock:ChrisBS|FeedbackDACOutput[6]                                                                               ; Clk      ;
; N/A                                     ; None                                                ; 8.089 ns   ; USB[15] ; BSblock:ChrisBS|FeedbackDACOutput[13]                                                                              ; Clk      ;
; N/A                                     ; None                                                ; 8.088 ns   ; USB[12] ; BSblock:ChrisBS|FeedbackDACOutput[2]                                                                               ; Clk      ;
; N/A                                     ; None                                                ; 8.088 ns   ; USB[12] ; BSblock:ChrisBS|FeedbackDACOutput[12]                                                                              ; Clk      ;
; N/A                                     ; None                                                ; 8.078 ns   ; USB[12] ; BSblock:ChrisBS|FeedbackDACOutput[11]                                                                              ; Clk      ;
; N/A                                     ; None                                                ; 8.066 ns   ; USB[14] ; BSblock:ChrisBS|FBCtr[0]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 8.066 ns   ; USB[12] ; BSblock:ChrisBS|FeedbackDACOutput[8]                                                                               ; Clk      ;
; N/A                                     ; None                                                ; 8.063 ns   ; USB[12] ; BSblock:ChrisBS|FeedbackDACOutput[15]                                                                              ; Clk      ;
; N/A                                     ; None                                                ; 8.063 ns   ; USB[12] ; BSblock:ChrisBS|FeedbackDACOutput[7]                                                                               ; Clk      ;
; N/A                                     ; None                                                ; 8.063 ns   ; USB[12] ; BSblock:ChrisBS|FeedbackDACOutput[10]                                                                              ; Clk      ;
; N/A                                     ; None                                                ; 8.057 ns   ; USB[15] ; BSblock:ChrisBS|FeedbackDACOutput[5]                                                                               ; Clk      ;
; N/A                                     ; None                                                ; 8.057 ns   ; USB[15] ; BSblock:ChrisBS|FeedbackDACOutput[0]                                                                               ; Clk      ;
; N/A                                     ; None                                                ; 8.057 ns   ; USB[15] ; BSblock:ChrisBS|FeedbackDACOutput[1]                                                                               ; Clk      ;
; N/A                                     ; None                                                ; 8.057 ns   ; USB[15] ; BSblock:ChrisBS|FeedbackDACOutput[9]                                                                               ; Clk      ;
; N/A                                     ; None                                                ; 8.056 ns   ; USB[14] ; BSblock:ChrisBS|FBCtr[1]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 8.056 ns   ; USB[14] ; BSblock:ChrisBS|FBCtr[2]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 8.056 ns   ; USB[14] ; BSblock:ChrisBS|FBCtr[3]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 8.056 ns   ; USB[14] ; BSblock:ChrisBS|FBCtr[4]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 8.056 ns   ; USB[14] ; BSblock:ChrisBS|FBCtr[5]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 8.056 ns   ; USB[14] ; BSblock:ChrisBS|FBCtr[7]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 8.056 ns   ; USB[14] ; BSblock:ChrisBS|FBCtr[6]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 8.050 ns   ; USB[8]  ; BSblock:ChrisBS|DataOut[0]                                                                                         ; Clk      ;
; N/A                                     ; None                                                ; 8.048 ns   ; USB[14] ; BSblock:ChrisBS|FeedbackDACOutput[2]                                                                               ; Clk      ;
; N/A                                     ; None                                                ; 8.048 ns   ; USB[14] ; BSblock:ChrisBS|FeedbackDACOutput[12]                                                                              ; Clk      ;
; N/A                                     ; None                                                ; 8.038 ns   ; USB[14] ; BSblock:ChrisBS|FeedbackDACOutput[11]                                                                              ; Clk      ;
; N/A                                     ; None                                                ; 8.035 ns   ; USB[14] ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|ram_block1a5~porta_address_reg2  ; Clk      ;
; N/A                                     ; None                                                ; 8.026 ns   ; USB[14] ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|ram_block1a5~porta_address_reg9  ; Clk      ;
; N/A                                     ; None                                                ; 8.026 ns   ; USB[14] ; BSblock:ChrisBS|FeedbackDACOutput[8]                                                                               ; Clk      ;
; N/A                                     ; None                                                ; 8.024 ns   ; USB[14] ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|ram_block1a10~porta_address_reg9 ; Clk      ;
; N/A                                     ; None                                                ; 8.023 ns   ; USB[14] ; BSblock:ChrisBS|FeedbackDACOutput[15]                                                                              ; Clk      ;
; N/A                                     ; None                                                ; 8.023 ns   ; USB[14] ; BSblock:ChrisBS|FeedbackDACOutput[7]                                                                               ; Clk      ;
; N/A                                     ; None                                                ; 8.023 ns   ; USB[14] ; BSblock:ChrisBS|FeedbackDACOutput[10]                                                                              ; Clk      ;
; N/A                                     ; None                                                ; 8.006 ns   ; USB[8]  ; BSblock:ChrisBS|DataOut[2]                                                                                         ; Clk      ;
; N/A                                     ; None                                                ; 7.993 ns   ; USB[14] ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|ram_block1a5~porta_address_reg7  ; Clk      ;
; N/A                                     ; None                                                ; 7.988 ns   ; USB[10] ; BSblock:ChrisBS|DataOut[0]                                                                                         ; Clk      ;
; N/A                                     ; None                                                ; 7.987 ns   ; USB[14] ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|ram_block1a5~porta_address_reg3  ; Clk      ;
; N/A                                     ; None                                                ; 7.934 ns   ; USB[12] ; BSblock:ChrisBS|Setpoint[2]                                                                                        ; Clk      ;
; N/A                                     ; None                                                ; 7.934 ns   ; USB[12] ; BSblock:ChrisBS|Setpoint[6]                                                                                        ; Clk      ;
; N/A                                     ; None                                                ; 7.931 ns   ; USB[12] ; BSblock:ChrisBS|FeedbackStep[15]                                                                                   ; Clk      ;
; N/A                                     ; None                                                ; 7.931 ns   ; USB[12] ; BSblock:ChrisBS|FeedbackStep[8]                                                                                    ; Clk      ;
; N/A                                     ; None                                                ; 7.931 ns   ; USB[12] ; BSblock:ChrisBS|FeedbackStep[9]                                                                                    ; Clk      ;
; N/A                                     ; None                                                ; 7.931 ns   ; USB[12] ; BSblock:ChrisBS|FeedbackStep[10]                                                                                   ; Clk      ;
; N/A                                     ; None                                                ; 7.931 ns   ; USB[12] ; BSblock:ChrisBS|FeedbackStep[11]                                                                                   ; Clk      ;
; N/A                                     ; None                                                ; 7.931 ns   ; USB[12] ; BSblock:ChrisBS|FeedbackStep[12]                                                                                   ; Clk      ;
; N/A                                     ; None                                                ; 7.931 ns   ; USB[12] ; BSblock:ChrisBS|FeedbackStep[13]                                                                                   ; Clk      ;
; N/A                                     ; None                                                ; 7.931 ns   ; USB[12] ; BSblock:ChrisBS|FeedbackStep[14]                                                                                   ; Clk      ;
; N/A                                     ; None                                                ; 7.921 ns   ; USB[13] ; BSblock:ChrisBS|FBCtr[0]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 7.911 ns   ; USB[13] ; BSblock:ChrisBS|FBCtr[1]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 7.911 ns   ; USB[13] ; BSblock:ChrisBS|FBCtr[2]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 7.911 ns   ; USB[13] ; BSblock:ChrisBS|FBCtr[3]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 7.911 ns   ; USB[13] ; BSblock:ChrisBS|FBCtr[4]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 7.911 ns   ; USB[13] ; BSblock:ChrisBS|FBCtr[5]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 7.911 ns   ; USB[13] ; BSblock:ChrisBS|FBCtr[7]                                                                                           ; Clk      ;
; N/A                                     ; None                                                ; 7.911 ns   ; USB[13] ; BSblock:ChrisBS|FBCtr[6]                                                                                           ; Clk      ;
; Timing analysis restricted to 100 rows. ; To change the limit use Settings (Assignments menu) ;            ;         ;                                                                                                                    ;          ;
+-----------------------------------------+-----------------------------------------------------+------------+---------+--------------------------------------------------------------------------------------------------------------------+----------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; tco                                                                                                                                                   ;
+-------+--------------+------------+-------------------------------------------------------------------------------------------+----------+------------+
; Slack ; Required tco ; Actual tco ; From                                                                                      ; To       ; From Clock ;
+-------+--------------+------------+-------------------------------------------------------------------------------------------+----------+------------+
; N/A   ; None         ; 9.476 ns   ; BS2:ADChandler|ADCsCS                                                                     ; ADCsCS   ; Clk        ;
; N/A   ; None         ; 8.927 ns   ; BS2:ADChandler|ADCsClk                                                                    ; ADCsClk  ; Clk        ;
; N/A   ; None         ; 8.590 ns   ; BS2:ADChandler|ADCsSDI                                                                    ; ADCsSDI  ; Clk        ;
; N/A   ; None         ; 8.208 ns   ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|q_a[3]  ; DACf[3]  ; Clk        ;
; N/A   ; None         ; 7.918 ns   ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|q_a[7]  ; DACf[7]  ; Clk        ;
; N/A   ; None         ; 7.901 ns   ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|q_a[0]  ; DACf[0]  ; Clk        ;
; N/A   ; None         ; 7.865 ns   ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|q_a[1]  ; DACf[1]  ; Clk        ;
; N/A   ; None         ; 7.747 ns   ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|q_a[2]  ; DACf[2]  ; Clk        ;
; N/A   ; None         ; 7.675 ns   ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|q_a[9]  ; DACf[9]  ; Clk        ;
; N/A   ; None         ; 7.498 ns   ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|q_a[5]  ; DACf[5]  ; Clk        ;
; N/A   ; None         ; 7.494 ns   ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|q_a[4]  ; DACf[4]  ; Clk        ;
; N/A   ; None         ; 7.468 ns   ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|q_a[11] ; DACf[11] ; Clk        ;
; N/A   ; None         ; 7.396 ns   ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|q_a[6]  ; DACf[6]  ; Clk        ;
; N/A   ; None         ; 7.394 ns   ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|q_a[8]  ; DACf[8]  ; Clk        ;
; N/A   ; None         ; 7.138 ns   ; lpm_ram_dq10:inst1|altsyncram:altsyncram_component|altsyncram_h711:auto_generated|q_a[10] ; DACf[10] ; Clk        ;
; N/A   ; None         ; 6.507 ns   ; BSblock:ChrisBS|DACSingleOut[2]                                                           ; DACf[2]  ; Clk        ;
; N/A   ; None         ; 6.500 ns   ; BSblock:ChrisBS|DACSingleOut[3]                                                           ; DACf[3]  ; Clk        ;
; N/A   ; None         ; 6.454 ns   ; BSblock:ChrisBS|DataOut[1]                                                                ; USB[1]   ; Clk        ;
; N/A   ; None         ; 6.321 ns   ; BSblock:ChrisBS|DataOut[6]                                                                ; USB[6]   ; Clk        ;
; N/A   ; None         ; 6.301 ns   ; BSblock:ChrisBS|DACSingleOut[0]                                                           ; DACf[0]  ; Clk        ;
; N/A   ; None         ; 6.278 ns   ; BSblock:ChrisBS|DACSingleOut[1]                                                           ; DACf[1]  ; Clk        ;
; N/A   ; None         ; 6.094 ns   ; BSblock:ChrisBS|DataOut[3]                                                                ; USB[3]   ; Clk        ;
; N/A   ; None         ; 6.080 ns   ; BSblock:ChrisBS|DACSingleOut[9]                                                           ; DACf[9]  ; Clk        ;
; N/A   ; None         ; 6.007 ns   ; BSSlow:inst|DACsData                                                                      ; DACsData ; Clk        ;
; N/A   ; None         ; 6.005 ns   ; BSSlow:inst|DACsSync                                                                      ; DACsSync ; Clk        ;
; N/A   ; None         ; 5.969 ns   ; BSblock:ChrisBS|DataOut[7]                                                                ; USB[7]   ; Clk        ;
; N/A   ; None         ; 5.909 ns   ; BSblock:ChrisBS|DACSingleOut[7]                                                           ; DACf[7]  ; Clk        ;
; N/A   ; None         ; 5.897 ns   ; BSblock:ChrisBS|DACSingleOut[5]                                                           ; DACf[5]  ; Clk        ;
; N/A   ; None         ; 5.885 ns   ; BSblock:ChrisBS|DACSingleOut[4]                                                           ; DACf[4]  ; Clk        ;
; N/A   ; None         ; 5.884 ns   ; BSblock:ChrisBS|DACSingleOut[6]                                                           ; DACf[6]  ; Clk        ;
; N/A   ; None         ; 5.864 ns   ; BSblock:ChrisBS|DataOut[0]                                                                ; USB[0]   ; Clk        ;
; N/A   ; None         ; 5.857 ns   ; BSblock:ChrisBS|DACSingleOut[11]                                                          ; DACf[11] ; Clk        ;
; N/A   ; None         ; 5.565 ns   ; BSblock:ChrisBS|DACSingleOut[8]                                                           ; DACf[8]  ; Clk        ;
; N/A   ; None         ; 5.560 ns   ; BSblock:ChrisBS|DACSingleOut[10]                                                          ; DACf[10] ; Clk        ;
; N/A   ; None         ; 5.456 ns   ; BSblock:ChrisBS|DataOut[4]                                                                ; USB[4]   ; Clk        ;
; N/A   ; None         ; 5.454 ns   ; BSblock:ChrisBS|DataOut[2]                                                                ; USB[2]   ; Clk        ;
; N/A   ; None         ; 5.214 ns   ; BSblock:ChrisBS|DataOut[5]                                                                ; USB[5]   ; Clk        ;
+-------+--------------+------------+-------------------------------------------------------------------------------------------+----------+------------+


+------------------------------------------------------------------+
; tpd                                                              ;
+-------+-------------------+-----------------+---------+----------+
; Slack ; Required P2P Time ; Actual P2P Time ; From    ; To       ;
+-------+-------------------+-----------------+---------+----------+
; N/A   ; None              ; 12.140 ns       ; USB[15] ; DACf[0]  ;
; N/A   ; None              ; 12.127 ns       ; USB[15] ; DACf[1]  ;
; N/A   ; None              ; 11.915 ns       ; USB[15] ; DACf[2]  ;
; N/A   ; None              ; 11.910 ns       ; USB[15] ; DACf[3]  ;
; N/A   ; None              ; 11.887 ns       ; USB[12] ; DACf[0]  ;
; N/A   ; None              ; 11.874 ns       ; USB[12] ; DACf[1]  ;
; N/A   ; None              ; 11.835 ns       ; USB[14] ; DACf[0]  ;
; N/A   ; None              ; 11.822 ns       ; USB[14] ; DACf[1]  ;
; N/A   ; None              ; 11.760 ns       ; USB[15] ; DACf[7]  ;
; N/A   ; None              ; 11.747 ns       ; USB[15] ; DACf[5]  ;
; N/A   ; None              ; 11.732 ns       ; USB[15] ; DACf[6]  ;
; N/A   ; None              ; 11.729 ns       ; USB[15] ; DACf[4]  ;
; N/A   ; None              ; 11.690 ns       ; USB[13] ; DACf[0]  ;
; N/A   ; None              ; 11.677 ns       ; USB[13] ; DACf[1]  ;
; N/A   ; None              ; 11.662 ns       ; USB[12] ; DACf[2]  ;
; N/A   ; None              ; 11.657 ns       ; USB[12] ; DACf[3]  ;
; N/A   ; None              ; 11.610 ns       ; USB[14] ; DACf[2]  ;
; N/A   ; None              ; 11.605 ns       ; USB[14] ; DACf[3]  ;
; N/A   ; None              ; 11.507 ns       ; USB[12] ; DACf[7]  ;
; N/A   ; None              ; 11.494 ns       ; USB[12] ; DACf[5]  ;
; N/A   ; None              ; 11.489 ns       ; USB[15] ; DACf[9]  ;
; N/A   ; None              ; 11.479 ns       ; USB[12] ; DACf[6]  ;
; N/A   ; None              ; 11.476 ns       ; USB[12] ; DACf[4]  ;
; N/A   ; None              ; 11.465 ns       ; USB[13] ; DACf[2]  ;
; N/A   ; None              ; 11.460 ns       ; USB[13] ; DACf[3]  ;
; N/A   ; None              ; 11.455 ns       ; USB[14] ; DACf[7]  ;
; N/A   ; None              ; 11.442 ns       ; USB[14] ; DACf[5]  ;
; N/A   ; None              ; 11.427 ns       ; USB[14] ; DACf[6]  ;
; N/A   ; None              ; 11.424 ns       ; USB[14] ; DACf[4]  ;
; N/A   ; None              ; 11.410 ns       ; USB[15] ; DACf[8]  ;
; N/A   ; None              ; 11.310 ns       ; USB[13] ; DACf[7]  ;
; N/A   ; None              ; 11.297 ns       ; USB[13] ; DACf[5]  ;
; N/A   ; None              ; 11.282 ns       ; USB[13] ; DACf[6]  ;
; N/A   ; None              ; 11.279 ns       ; USB[13] ; DACf[4]  ;
; N/A   ; None              ; 11.236 ns       ; USB[12] ; DACf[9]  ;
; N/A   ; None              ; 11.233 ns       ; USB[15] ; DACf[11] ;
; N/A   ; None              ; 11.184 ns       ; USB[14] ; DACf[9]  ;
; N/A   ; None              ; 11.157 ns       ; USB[12] ; DACf[8]  ;
; N/A   ; None              ; 11.105 ns       ; USB[14] ; DACf[8]  ;
; N/A   ; None              ; 11.039 ns       ; USB[13] ; DACf[9]  ;
; N/A   ; None              ; 10.980 ns       ; USB[12] ; DACf[11] ;
; N/A   ; None              ; 10.960 ns       ; USB[13] ; DACf[8]  ;
; N/A   ; None              ; 10.937 ns       ; USB[15] ; DACf[10] ;
; N/A   ; None              ; 10.928 ns       ; USB[15] ; USB[0]   ;
; N/A   ; None              ; 10.928 ns       ; USB[14] ; DACf[11] ;
; N/A   ; None              ; 10.839 ns       ; USB[15] ; USB[1]   ;
; N/A   ; None              ; 10.839 ns       ; USB[15] ; USB[2]   ;
; N/A   ; None              ; 10.783 ns       ; USB[13] ; DACf[11] ;
; N/A   ; None              ; 10.684 ns       ; USB[12] ; DACf[10] ;
; N/A   ; None              ; 10.675 ns       ; USB[12] ; USB[0]   ;
; N/A   ; None              ; 10.632 ns       ; USB[14] ; DACf[10] ;
; N/A   ; None              ; 10.626 ns       ; USB[14] ; USB[0]   ;
; N/A   ; None              ; 10.586 ns       ; USB[12] ; USB[1]   ;
; N/A   ; None              ; 10.586 ns       ; USB[12] ; USB[2]   ;
; N/A   ; None              ; 10.537 ns       ; USB[14] ; USB[1]   ;
; N/A   ; None              ; 10.537 ns       ; USB[14] ; USB[2]   ;
; N/A   ; None              ; 10.523 ns       ; USB[15] ; USB[7]   ;
; N/A   ; None              ; 10.487 ns       ; USB[13] ; DACf[10] ;
; N/A   ; None              ; 10.482 ns       ; USB[13] ; USB[0]   ;
; N/A   ; None              ; 10.393 ns       ; USB[13] ; USB[1]   ;
; N/A   ; None              ; 10.393 ns       ; USB[13] ; USB[2]   ;
; N/A   ; None              ; 10.315 ns       ; USB[15] ; USB[3]   ;
; N/A   ; None              ; 10.315 ns       ; USB[15] ; USB[4]   ;
; N/A   ; None              ; 10.270 ns       ; USB[12] ; USB[7]   ;
; N/A   ; None              ; 10.221 ns       ; USB[14] ; USB[7]   ;
; N/A   ; None              ; 10.077 ns       ; USB[13] ; USB[7]   ;
; N/A   ; None              ; 10.072 ns       ; USB[15] ; USB[5]   ;
; N/A   ; None              ; 10.072 ns       ; USB[15] ; USB[6]   ;
; N/A   ; None              ; 10.062 ns       ; USB[12] ; USB[3]   ;
; N/A   ; None              ; 10.062 ns       ; USB[12] ; USB[4]   ;
; N/A   ; None              ; 10.013 ns       ; USB[14] ; USB[3]   ;
; N/A   ; None              ; 10.013 ns       ; USB[14] ; USB[4]   ;
; N/A   ; None              ; 9.869 ns        ; USB[13] ; USB[3]   ;
; N/A   ; None              ; 9.869 ns        ; USB[13] ; USB[4]   ;
; N/A   ; None              ; 9.819 ns        ; USB[12] ; USB[5]   ;
; N/A   ; None              ; 9.819 ns        ; USB[12] ; USB[6]   ;
; N/A   ; None              ; 9.770 ns        ; USB[14] ; USB[5]   ;
; N/A   ; None              ; 9.770 ns        ; USB[14] ; USB[6]   ;
; N/A   ; None              ; 9.626 ns        ; USB[13] ; USB[5]   ;
; N/A   ; None              ; 9.626 ns        ; USB[13] ; USB[6]   ;
; N/A   ; None              ; 8.433 ns        ; USB[13] ; Dig[2]   ;
; N/A   ; None              ; 7.501 ns        ; USB[14] ; Dig[1]   ;
; N/A   ; None              ; 7.301 ns        ; USB[15] ; Dig[0]   ;
; N/A   ; None              ; 3.865 ns        ; Clk     ; DACfClk  ;
; N/A   ; None              ; 3.839 ns        ; Clk     ; DACsClk  ;
+-------+-------------------+-----------------+---------+----------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; th                                                                                                                                                        ;
+-----------------------------------------+-----------------------------------------------------+-----------+---------+--------------------------+----------+
; Minimum Slack                           ; Required th                                         ; Actual th ; From    ; To                       ; To Clock ;
+-----------------------------------------+-----------------------------------------------------+-----------+---------+--------------------------+----------+
; N/A                                     ; None                                                ; -0.144 ns ; ADCsSDO ; BS2:ADChandler|Port6[5]  ; Clk      ;
; N/A                                     ; None                                                ; -0.144 ns ; ADCsSDO ; BS2:ADChandler|Port5[13] ; Clk      ;
; N/A                                     ; None                                                ; -0.245 ns ; ADCsSDO ; BS2:ADChandler|Port2[6]  ; Clk      ;
; N/A                                     ; None                                                ; -0.246 ns ; ADCsSDO ; BS2:ADChandler|Port6[13] ; Clk      ;
; N/A                                     ; None                                                ; -0.262 ns ; ADCsSDO ; BS2:ADChandler|Port2[15] ; Clk      ;
; N/A                                     ; None                                                ; -0.263 ns ; ADCsSDO ; BS2:ADChandler|Port3[15] ; Clk      ;
; N/A                                     ; None                                                ; -0.273 ns ; ADCsSDO ; BS2:ADChandler|Port2[11] ; Clk      ;
; N/A                                     ; None                                                ; -0.275 ns ; ADCsSDO ; BS2:ADChandler|Port5[12] ; Clk      ;
; N/A                                     ; None                                                ; -0.390 ns ; ADCsSDO ; BS2:ADChandler|Port6[4]  ; Clk      ;
; N/A                                     ; None                                                ; -0.390 ns ; ADCsSDO ; BS2:ADChandler|Port7[4]  ; Clk      ;
; N/A                                     ; None                                                ; -0.601 ns ; ADCsSDO ; BS2:ADChandler|Port4[11] ; Clk      ;
; N/A                                     ; None                                                ; -0.602 ns ; ADCsSDO ; BS2:ADChandler|Port1[12] ; Clk      ;
; N/A                                     ; None                                                ; -0.607 ns ; ADCsSDO ; BS2:ADChandler|Port6[14] ; Clk      ;
; N/A                                     ; None                                                ; -0.608 ns ; ADCsSDO ; BS2:ADChandler|Port4[15] ; Clk      ;
; N/A                                     ; None                                                ; -0.620 ns ; ADCsSDO ; BS2:ADChandler|Port4[6]  ; Clk      ;
; N/A                                     ; None                                                ; -0.620 ns ; ADCsSDO ; BS2:ADChandler|Port2[14] ; Clk      ;
; N/A                                     ; None                                                ; -0.633 ns ; ADCsSDO ; BS2:ADChandler|Port7[6]  ; Clk      ;
; N/A                                     ; None                                                ; -0.635 ns ; ADCsSDO ; BS2:ADChandler|Port5[14] ; Clk      ;
; N/A                                     ; None                                                ; -0.635 ns ; ADCsSDO ; BS2:ADChandler|Port8[14] ; Clk      ;
; N/A                                     ; None                                                ; -0.635 ns ; ADCsSDO ; BS2:ADChandler|Port8[9]  ; Clk      ;
; N/A                                     ; None                                                ; -0.635 ns ; ADCsSDO ; BS2:ADChandler|Port7[8]  ; Clk      ;
; N/A                                     ; None                                                ; -0.636 ns ; ADCsSDO ; BS2:ADChandler|Port6[3]  ; Clk      ;
; N/A                                     ; None                                                ; -0.669 ns ; ADCsSDO ; BS2:ADChandler|Port6[6]  ; Clk      ;
; N/A                                     ; None                                                ; -0.669 ns ; ADCsSDO ; BS2:ADChandler|Port8[6]  ; Clk      ;
; N/A                                     ; None                                                ; -0.670 ns ; ADCsSDO ; BS2:ADChandler|Port4[12] ; Clk      ;
; N/A                                     ; None                                                ; -0.672 ns ; ADCsSDO ; BS2:ADChandler|Port5[9]  ; Clk      ;
; N/A                                     ; None                                                ; -0.725 ns ; ADCsSDO ; BS2:ADChandler|Port5[15] ; Clk      ;
; N/A                                     ; None                                                ; -0.752 ns ; ADCsSDO ; BS2:ADChandler|Port7[14] ; Clk      ;
; N/A                                     ; None                                                ; -0.768 ns ; ADCsSDO ; BS2:ADChandler|Port4[14] ; Clk      ;
; N/A                                     ; None                                                ; -0.771 ns ; ADCsSDO ; BS2:ADChandler|Port5[6]  ; Clk      ;
; N/A                                     ; None                                                ; -0.797 ns ; ADCsSDO ; BS2:ADChandler|Port8[12] ; Clk      ;
; N/A                                     ; None                                                ; -0.819 ns ; ADCsSDO ; BS2:ADChandler|Port6[15] ; Clk      ;
; N/A                                     ; None                                                ; -0.855 ns ; ADCsSDO ; BS2:ADChandler|Port6[9]  ; Clk      ;
; N/A                                     ; None                                                ; -0.856 ns ; ADCsSDO ; BS2:ADChandler|Port8[15] ; Clk      ;
; N/A                                     ; None                                                ; -0.856 ns ; ADCsSDO ; BS2:ADChandler|Port7[15] ; Clk      ;
; N/A                                     ; None                                                ; -0.857 ns ; ADCsSDO ; BS2:ADChandler|Port2[13] ; Clk      ;
; N/A                                     ; None                                                ; -0.910 ns ; ADCsSDO ; BS2:ADChandler|Port5[3]  ; Clk      ;
; N/A                                     ; None                                                ; -0.912 ns ; ADCsSDO ; BS2:ADChandler|Port7[9]  ; Clk      ;
; N/A                                     ; None                                                ; -0.915 ns ; ADCsSDO ; BS2:ADChandler|Port1[6]  ; Clk      ;
; N/A                                     ; None                                                ; -0.915 ns ; ADCsSDO ; BS2:ADChandler|Port5[4]  ; Clk      ;
; N/A                                     ; None                                                ; -0.931 ns ; ADCsSDO ; BS2:ADChandler|Port6[12] ; Clk      ;
; N/A                                     ; None                                                ; -0.935 ns ; ADCsSDO ; BS2:ADChandler|Port4[9]  ; Clk      ;
; N/A                                     ; None                                                ; -0.936 ns ; ADCsSDO ; BS2:ADChandler|Port8[1]  ; Clk      ;
; N/A                                     ; None                                                ; -0.941 ns ; ADCsSDO ; BS2:ADChandler|Port7[12] ; Clk      ;
; N/A                                     ; None                                                ; -0.943 ns ; ADCsSDO ; BS2:ADChandler|Port1[8]  ; Clk      ;
; N/A                                     ; None                                                ; -0.944 ns ; ADCsSDO ; BS2:ADChandler|Port1[10] ; Clk      ;
; N/A                                     ; None                                                ; -0.963 ns ; ADCsSDO ; BS2:ADChandler|Port3[9]  ; Clk      ;
; N/A                                     ; None                                                ; -0.964 ns ; ADCsSDO ; BS2:ADChandler|Port8[3]  ; Clk      ;
; N/A                                     ; None                                                ; -0.974 ns ; ADCsSDO ; BS2:ADChandler|Port3[12] ; Clk      ;
; N/A                                     ; None                                                ; -0.975 ns ; ADCsSDO ; BS2:ADChandler|Port2[12] ; Clk      ;
; N/A                                     ; None                                                ; -1.022 ns ; ADCsSDO ; BS2:ADChandler|Port4[13] ; Clk      ;
; N/A                                     ; None                                                ; -1.036 ns ; ADCsSDO ; BS2:ADChandler|Port2[0]  ; Clk      ;
; N/A                                     ; None                                                ; -1.037 ns ; ADCsSDO ; BS2:ADChandler|Port2[3]  ; Clk      ;
; N/A                                     ; None                                                ; -1.081 ns ; ADCsSDO ; BS2:ADChandler|Port3[14] ; Clk      ;
; N/A                                     ; None                                                ; -1.094 ns ; ADCsSDO ; BS2:ADChandler|Port6[8]  ; Clk      ;
; N/A                                     ; None                                                ; -1.097 ns ; ADCsSDO ; BS2:ADChandler|Port6[0]  ; Clk      ;
; N/A                                     ; None                                                ; -1.150 ns ; ADCsSDO ; BS2:ADChandler|Port8[13] ; Clk      ;
; N/A                                     ; None                                                ; -1.250 ns ; ADCsSDO ; BS2:ADChandler|Port2[2]  ; Clk      ;
; N/A                                     ; None                                                ; -1.255 ns ; ADCsSDO ; BS2:ADChandler|Port5[1]  ; Clk      ;
; N/A                                     ; None                                                ; -1.268 ns ; ADCsSDO ; BS2:ADChandler|Port2[9]  ; Clk      ;
; N/A                                     ; None                                                ; -1.271 ns ; ADCsSDO ; BS2:ADChandler|Port1[15] ; Clk      ;
; N/A                                     ; None                                                ; -1.285 ns ; ADCsSDO ; BS2:ADChandler|Port6[1]  ; Clk      ;
; N/A                                     ; None                                                ; -1.286 ns ; ADCsSDO ; BS2:ADChandler|Port4[1]  ; Clk      ;
; N/A                                     ; None                                                ; -1.290 ns ; ADCsSDO ; BS2:ADChandler|Port6[7]  ; Clk      ;
; N/A                                     ; None                                                ; -1.298 ns ; ADCsSDO ; BS2:ADChandler|Port5[5]  ; Clk      ;
; N/A                                     ; None                                                ; -1.300 ns ; ADCsSDO ; BS2:ADChandler|Port3[13] ; Clk      ;
; N/A                                     ; None                                                ; -1.301 ns ; ADCsSDO ; BS2:ADChandler|Port1[11] ; Clk      ;
; N/A                                     ; None                                                ; -1.301 ns ; ADCsSDO ; BS2:ADChandler|Port4[5]  ; Clk      ;
; N/A                                     ; None                                                ; -1.301 ns ; ADCsSDO ; BS2:ADChandler|Port3[11] ; Clk      ;
; N/A                                     ; None                                                ; -1.302 ns ; ADCsSDO ; BS2:ADChandler|Port4[7]  ; Clk      ;
; N/A                                     ; None                                                ; -1.303 ns ; ADCsSDO ; BS2:ADChandler|Port2[7]  ; Clk      ;
; N/A                                     ; None                                                ; -1.303 ns ; ADCsSDO ; BS2:ADChandler|Port4[3]  ; Clk      ;
; N/A                                     ; None                                                ; -1.304 ns ; ADCsSDO ; BS2:ADChandler|Port7[3]  ; Clk      ;
; N/A                                     ; None                                                ; -1.308 ns ; ADCsSDO ; BS2:ADChandler|Port7[7]  ; Clk      ;
; N/A                                     ; None                                                ; -1.309 ns ; ADCsSDO ; BS2:ADChandler|Port5[7]  ; Clk      ;
; N/A                                     ; None                                                ; -1.310 ns ; ADCsSDO ; BS2:ADChandler|Port1[7]  ; Clk      ;
; N/A                                     ; None                                                ; -1.310 ns ; ADCsSDO ; BS2:ADChandler|Port5[0]  ; Clk      ;
; N/A                                     ; None                                                ; -1.312 ns ; ADCsSDO ; BS2:ADChandler|Port7[11] ; Clk      ;
; N/A                                     ; None                                                ; -1.313 ns ; ADCsSDO ; BS2:ADChandler|Port8[4]  ; Clk      ;
; N/A                                     ; None                                                ; -1.313 ns ; ADCsSDO ; BS2:ADChandler|Port5[11] ; Clk      ;
; N/A                                     ; None                                                ; -1.314 ns ; ADCsSDO ; BS2:ADChandler|Port4[4]  ; Clk      ;
; N/A                                     ; None                                                ; -1.314 ns ; ADCsSDO ; BS2:ADChandler|Port7[0]  ; Clk      ;
; N/A                                     ; None                                                ; -1.316 ns ; ADCsSDO ; BS2:ADChandler|Port3[0]  ; Clk      ;
; N/A                                     ; None                                                ; -1.318 ns ; ADCsSDO ; BS2:ADChandler|Port8[11] ; Clk      ;
; N/A                                     ; None                                                ; -1.320 ns ; ADCsSDO ; BS2:ADChandler|Port6[11] ; Clk      ;
; N/A                                     ; None                                                ; -1.335 ns ; ADCsSDO ; BS2:ADChandler|Port3[5]  ; Clk      ;
; N/A                                     ; None                                                ; -1.335 ns ; ADCsSDO ; BS2:ADChandler|Port7[5]  ; Clk      ;
; N/A                                     ; None                                                ; -1.348 ns ; ADCsSDO ; BS2:ADChandler|Port1[1]  ; Clk      ;
; N/A                                     ; None                                                ; -1.350 ns ; ADCsSDO ; BS2:ADChandler|Port1[2]  ; Clk      ;
; N/A                                     ; None                                                ; -1.399 ns ; ADCsSDO ; BS2:ADChandler|Port2[10] ; Clk      ;
; N/A                                     ; None                                                ; -1.420 ns ; ADCsSDO ; BS2:ADChandler|Port8[7]  ; Clk      ;
; N/A                                     ; None                                                ; -1.495 ns ; ADCsSDO ; BS2:ADChandler|Port8[0]  ; Clk      ;
; N/A                                     ; None                                                ; -1.524 ns ; ADCsSDO ; BS2:ADChandler|Port5[10] ; Clk      ;
; N/A                                     ; None                                                ; -1.626 ns ; ADCsSDO ; BS2:ADChandler|Port2[1]  ; Clk      ;
; N/A                                     ; None                                                ; -1.628 ns ; ADCsSDO ; BS2:ADChandler|Port3[1]  ; Clk      ;
; N/A                                     ; None                                                ; -1.639 ns ; ADCsSDO ; BS2:ADChandler|Port2[5]  ; Clk      ;
; N/A                                     ; None                                                ; -1.639 ns ; ADCsSDO ; BS2:ADChandler|Port7[1]  ; Clk      ;
; N/A                                     ; None                                                ; -1.646 ns ; ADCsSDO ; BS2:ADChandler|Port8[10] ; Clk      ;
; N/A                                     ; None                                                ; -1.649 ns ; ADCsSDO ; BS2:ADChandler|Port8[8]  ; Clk      ;
; N/A                                     ; None                                                ; -1.656 ns ; ADCsSDO ; BS2:ADChandler|Port4[8]  ; Clk      ;
; Timing analysis restricted to 100 rows. ; To change the limit use Settings (Assignments menu) ;           ;         ;                          ;          ;
+-----------------------------------------+-----------------------------------------------------+-----------+---------+--------------------------+----------+


+--------------------------+
; Timing Analyzer Messages ;
+--------------------------+
Info: *******************************************************************
Info: Running Quartus II Timing Analyzer
    Info: Version 5.0 Build 168 06/22/2005 Service Pack 1 SJ Web Edition
    Info: Processing started: Mon Sep 19 16:00:32 2005
Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off BarrierShaper -c BarrierShaper --timing_analysis_only
Warning: Found 1 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew
    Info: Detected ripple clock "BSblock:ChrisBS|ADCClk" as buffer
Info: Slack time is -15.18 ns for clock "Clk" between source register "BSblock:ChrisBS|FBCtr[1]" and destination register "BSblock:ChrisBS|FeedbackDACOutput[0]"
    Info: Fmax is 39.71 MHz (period= 25.18 ns)
    Info: + Largest register to register requirement is 9.770 ns
        Info: + Setup relationship between source and destination is 10.000 ns
            Info: + Latch edge is 10.000 ns
                Info: Clock period of Destination clock "Clk" is 10.000 ns with  offset of 0.000 ns and duty cycle of 50
                Info: Multicycle Setup factor for Destination register is 1
            Info: - Launch edge is 0.000 ns
                Info: Clock period of Source clock "Clk" is 10.000 ns with  offset of 0.000 ns and duty cycle of 50
                Info: Multicycle Setup factor for Source register is 1
        Info: + Largest clock skew is -0.028 ns
            Info: + Shortest clock path from clock "Clk" to destination register is 2.110 ns
                Info: 1: + IC(0.000 ns) + CELL(1.130 ns) = 1.130 ns; Loc. = PIN_10; Fanout = 267; CLK Node = 'Clk'
                Info: 2: + IC(0.433 ns) + CELL(0.547 ns) = 2.110 ns; Loc. = LC_X19_Y5_N4; Fanout = 5; REG Node = 'BSblock:ChrisBS|FeedbackDACOutput[0]'
                Info: Total cell delay = 1.677 ns ( 79.48 % )
                Info: Total interconnect delay = 0.433 ns ( 20.52 % )
            Info: - Longest clock path from clock "Clk" to source register is 2.138 ns
                Info: 1: + IC(0.000 ns) + CELL(1.130 ns) = 1.130 ns; Loc. = PIN_10; Fanout = 267; CLK Node = 'Clk'
                Info: 2: + IC(0.461 ns) + CELL(0.547 ns) = 2.138 ns; Loc. = LC_X23_Y6_N5; Fanout = 3; REG Node = 'BSblock:ChrisBS|FBCtr[1]'
                Info: Total cell delay = 1.677 ns ( 78.44 % )
                Info: Total interconnect delay = 0.461 ns ( 21.56 % )
        Info: - Micro clock to output delay of source is 0.173 ns
        Info: - Micro setup delay of destination is 0.029 ns
    Info: - Longest register to register delay is 24.950 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X23_Y6_N5; Fanout = 3; REG Node = 'BSblock:ChrisBS|FBCtr[1]'
        Info: 2: + IC(0.566 ns) + CELL(0.326 ns) = 0.892 ns; Loc. = LC_X22_Y6_N1; Fanout = 2; COMB Node = 'BSblock:ChrisBS|add~2018'
        Info: 3: + IC(0.000 ns) + CELL(0.060 ns) = 0.952 ns; Loc. = LC_X22_Y6_N2; Fanout = 2; COMB Node = 'BSblock:ChrisBS|add~2028'
        Info: 4: + IC(0.000 ns) + CELL(0.060 ns) = 1.012 ns; Loc. = LC_X22_Y6_N3; Fanout = 2; COMB Node = 'BSblock:ChrisBS|add~2023'
        Info: 5: + IC(0.000 ns) + CELL(0.137 ns) = 1.149 ns; Loc. = LC_X22_Y6_N4; Fanout = 3; COMB Node = 'BSblock:ChrisBS|add~2038'
        Info: 6: + IC(0.000 ns) + CELL(0.478 ns) = 1.627 ns; Loc. = LC_X22_Y6_N7; Fanout = 3; COMB Node = 'BSblock:ChrisBS|add~2041'
        Info: 7: + IC(0.324 ns) + CELL(0.454 ns) = 2.405 ns; Loc. = LC_X22_Y6_N9; Fanout = 1; COMB Node = 'BSblock:ChrisBS|lpm_divide:mod_rtl_0|lpm_divide_vdf:auto_generated|sign_div_unsign_uhg:divider|alt_u_div_tld:divider|StageOut[8]~3417'
        Info: 8: + IC(0.951 ns) + CELL(0.225 ns) = 3.581 ns; Loc. = LC_X21_Y9_N9; Fanout = 4; COMB Node = 'BSblock:ChrisBS|lpm_divide:mod_rtl_0|lpm_divide_vdf:auto_generated|sign_div_unsign_uhg:divider|alt_u_div_tld:divider|StageOut[8]~3418'
        Info: 9: + IC(0.330 ns) + CELL(0.443 ns) = 4.354 ns; Loc. = LC_X21_Y9_N2; Fanout = 2; COMB Node = 'BSblock:ChrisBS|lpm_divide:mod_rtl_0|lpm_divide_vdf:auto_generated|sign_div_unsign_uhg:divider|alt_u_div_tld:divider|add_sub_me8:add_sub_2|add_sub_cella[0]~61COUT1_69'
        Info: 10: + IC(0.000 ns) + CELL(0.062 ns) = 4.416 ns; Loc. = LC_X21_Y9_N3; Fanout = 1; COMB Node = 'BSblock:ChrisBS|lpm_divide:mod_rtl_0|lpm_divide_vdf:auto_generated|sign_div_unsign_uhg:divider|alt_u_div_tld:divider|add_sub_me8:add_sub_2|add_sub_cella[0]~56COUT1_71'
        Info: 11: + IC(0.000 ns) + CELL(0.468 ns) = 4.884 ns; Loc. = LC_X21_Y9_N4; Fanout = 3; COMB Node = 'BSblock:ChrisBS|lpm_divide:mod_rtl_0|lpm_divide_vdf:auto_generated|sign_div_unsign_uhg:divider|alt_u_div_tld:divider|add_sub_me8:add_sub_2|add_sub_cella[0]~49'
        Info: 12: + IC(0.584 ns) + CELL(0.088 ns) = 5.556 ns; Loc. = LC_X22_Y9_N1; Fanout = 4; COMB Node = 'BSblock:ChrisBS|lpm_divide:mod_rtl_0|lpm_divide_vdf:auto_generated|sign_div_unsign_uhg:divider|alt_u_div_tld:divider|StageOut[17]~3419'
        Info: 13: + IC(0.336 ns) + CELL(0.443 ns) = 6.335 ns; Loc. = LC_X22_Y9_N7; Fanout = 2; COMB Node = 'BSblock:ChrisBS|lpm_divide:mod_rtl_0|lpm_divide_vdf:auto_generated|sign_div_unsign_uhg:divider|alt_u_div_tld:divider|add_sub_ne8:add_sub_3|add_sub_cella[0]~75COUT1_86'
        Info: 14: + IC(0.000 ns) + CELL(0.062 ns) = 6.397 ns; Loc. = LC_X22_Y9_N8; Fanout = 1; COMB Node = 'BSblock:ChrisBS|lpm_divide:mod_rtl_0|lpm_divide_vdf:auto_generated|sign_div_unsign_uhg:divider|alt_u_div_tld:divider|add_sub_ne8:add_sub_3|add_sub_cella[0]~70COUT1_88'
        Info: 15: + IC(0.000 ns) + CELL(0.468 ns) = 6.865 ns; Loc. = LC_X22_Y9_N9; Fanout = 4; COMB Node = 'BSblock:ChrisBS|lpm_divide:mod_rtl_0|lpm_divide_vdf:auto_generated|sign_div_unsign_uhg:divider|alt_u_div_tld:divider|add_sub_ne8:add_sub_3|add_sub_cella[0]~58'
        Info: 16: + IC(0.346 ns) + CELL(0.225 ns) = 7.436 ns; Loc. = LC_X22_Y9_N2; Fanout = 4; COMB Node = 'BSblock:ChrisBS|lpm_divide:mod_rtl_0|lpm_divide_vdf:auto_generated|sign_div_unsign_uhg:divider|alt_u_div_tld:divider|StageOut[25]~3401'
        Info: 17: + IC(0.527 ns) + CELL(0.333 ns) = 8.296 ns; Loc. = LC_X23_Y9_N3; Fanout = 2; COMB Node = 'BSblock:ChrisBS|lpm_divide:mod_rtl_0|lpm_divide_vdf:auto_generated|sign_div_unsign_uhg:divider|alt_u_div_tld:divider|add_sub_oe8:add_sub_4|add_sub_cella[0]~74COUT1_100'
        Info: 18: + IC(0.000 ns) + CELL(0.468 ns) = 8.764 ns; Loc. = LC_X23_Y9_N4; Fanout = 1; COMB Node = 'BSblock:ChrisBS|lpm_divide:mod_rtl_0|lpm_divide_vdf:auto_generated|sign_div_unsign_uhg:divider|alt_u_div_tld:divider|add_sub_oe8:add_sub_4|add_sub_cella[0]~87'
        Info: 19: + IC(0.513 ns) + CELL(0.340 ns) = 9.617 ns; Loc. = LC_X24_Y9_N9; Fanout = 4; COMB Node = 'BSblock:ChrisBS|lpm_divide:mod_rtl_0|lpm_divide_vdf:auto_generated|sign_div_unsign_uhg:divider|alt_u_div_tld:divider|StageOut[35]~3421'
        Info: 20: + IC(0.925 ns) + CELL(0.333 ns) = 10.875 ns; Loc. = LC_X24_Y8_N5; Fanout = 2; COMB Node = 'BSblock:ChrisBS|lpm_divide:mod_rtl_0|lpm_divide_vdf:auto_generated|sign_div_unsign_uhg:divider|alt_u_div_tld:divider|add_sub_pe8:add_sub_5|add_sub_cella[0]~103COUT1_117'
        Info: 21: + IC(0.000 ns) + CELL(0.062 ns) = 10.937 ns; Loc. = LC_X24_Y8_N6; Fanout = 1; COMB Node = 'BSblock:ChrisBS|lpm_divide:mod_rtl_0|lpm_divide_vdf:auto_generated|sign_div_unsign_uhg:divider|alt_u_div_tld:divider|add_sub_pe8:add_sub_5|add_sub_cella[0]~98COUT1_119'
        Info: 22: + IC(0.000 ns) + CELL(0.468 ns) = 11.405 ns; Loc. = LC_X24_Y8_N7; Fanout = 6; COMB Node = 'BSblock:ChrisBS|lpm_divide:mod_rtl_0|lpm_divide_vdf:auto_generated|sign_div_unsign_uhg:divider|alt_u_div_tld:divider|add_sub_pe8:add_sub_5|add_sub_cella[0]~76'
        Info: 23: + IC(0.652 ns) + CELL(0.225 ns) = 12.282 ns; Loc. = LC_X23_Y8_N9; Fanout = 4; COMB Node = 'BSblock:ChrisBS|lpm_divide:mod_rtl_0|lpm_divide_vdf:auto_generated|sign_div_unsign_uhg:divider|alt_u_div_tld:divider|StageOut[40]~3398'
        Info: 24: + IC(0.548 ns) + CELL(0.326 ns) = 13.156 ns; Loc. = LC_X22_Y8_N1; Fanout = 2; COMB Node = 'BSblock:ChrisBS|lpm_divide:mod_rtl_0|lpm_divide_vdf:auto_generated|sign_div_unsign_uhg:divider|alt_u_div_tld:divider|add_sub_qe8:add_sub_6|add_sub_cella[0]~97'
        Info: 25: + IC(0.000 ns) + CELL(0.060 ns) = 13.216 ns; Loc. = LC_X22_Y8_N2; Fanout = 2; COMB Node = 'BSblock:ChrisBS|lpm_divide:mod_rtl_0|lpm_divide_vdf:auto_generated|sign_div_unsign_uhg:divider|alt_u_div_tld:divider|add_sub_qe8:add_sub_6|add_sub_cella[0]~92'
        Info: 26: + IC(0.000 ns) + CELL(0.060 ns) = 13.276 ns; Loc. = LC_X22_Y8_N3; Fanout = 2; COMB Node = 'BSblock:ChrisBS|lpm_divide:mod_rtl_0|lpm_divide_vdf:auto_generated|sign_div_unsign_uhg:divider|alt_u_div_tld:divider|add_sub_qe8:add_sub_6|add_sub_cella[0]~107'
        Info: 27: + IC(0.000 ns) + CELL(0.137 ns) = 13.413 ns; Loc. = LC_X22_Y8_N4; Fanout = 3; COMB Node = 'BSblock:ChrisBS|lpm_divide:mod_rtl_0|lpm_divide_vdf:auto_generated|sign_div_unsign_uhg:divider|alt_u_div_tld:divider|add_sub_qe8:add_sub_6|add_sub_cella[0]~102'
        Info: 28: + IC(0.000 ns) + CELL(0.478 ns) = 13.891 ns; Loc. = LC_X22_Y8_N7; Fanout = 7; COMB Node = 'BSblock:ChrisBS|lpm_divide:mod_rtl_0|lpm_divide_vdf:auto_generated|sign_div_unsign_uhg:divider|alt_u_div_tld:divider|add_sub_qe8:add_sub_6|add_sub_cella[0]~85'
        Info: 29: + IC(0.579 ns) + CELL(0.225 ns) = 14.695 ns; Loc. = LC_X21_Y8_N4; Fanout = 5; COMB Node = 'BSblock:ChrisBS|lpm_divide:mod_rtl_0|lpm_divide_vdf:auto_generated|sign_div_unsign_uhg:divider|alt_u_div_tld:divider|StageOut[48]~3394'
        Info: 30: + IC(0.930 ns) + CELL(0.326 ns) = 15.951 ns; Loc. = LC_X22_Y5_N1; Fanout = 2; COMB Node = 'BSblock:ChrisBS|lpm_divide:mod_rtl_0|lpm_divide_vdf:auto_generated|sign_div_unsign_uhg:divider|alt_u_div_tld:divider|add_sub_re8:add_sub_7|add_sub_cella[0]~143'
        Info: 31: + IC(0.000 ns) + CELL(0.060 ns) = 16.011 ns; Loc. = LC_X22_Y5_N2; Fanout = 2; COMB Node = 'BSblock:ChrisBS|lpm_divide:mod_rtl_0|lpm_divide_vdf:auto_generated|sign_div_unsign_uhg:divider|alt_u_div_tld:divider|add_sub_re8:add_sub_7|add_sub_cella[0]~138'
        Info: 32: + IC(0.000 ns) + CELL(0.060 ns) = 16.071 ns; Loc. = LC_X22_Y5_N3; Fanout = 2; COMB Node = 'BSblock:ChrisBS|lpm_divide:mod_rtl_0|lpm_divide_vdf:auto_generated|sign_div_unsign_uhg:divider|alt_u_div_tld:divider|add_sub_re8:add_sub_7|add_sub_cella[0]~133'
        Info: 33: + IC(0.000 ns) + CELL(0.137 ns) = 16.208 ns; Loc. = LC_X22_Y5_N4; Fanout = 4; COMB Node = 'BSblock:ChrisBS|lpm_divide:mod_rtl_0|lpm_divide_vdf:auto_generated|sign_div_unsign_uhg:divider|alt_u_div_tld:divider|add_sub_re8:add_sub_7|add_sub_cella[0]~118'
        Info: 34: + IC(0.000 ns) + CELL(0.478 ns) = 16.686 ns; Loc. = LC_X22_Y5_N6; Fanout = 2; COMB Node = 'BSblock:ChrisBS|lpm_divide:mod_rtl_0|lpm_divide_vdf:auto_generated|sign_div_unsign_uhg:divider|alt_u_div_tld:divider|add_sub_re8:add_sub_7|add_sub_cella[0]~126'
        Info: 35: + IC(0.586 ns) + CELL(0.454 ns) = 17.726 ns; Loc. = LC_X21_Y5_N3; Fanout = 1; COMB Node = 'BSblock:ChrisBS|reduce_nor~496'
        Info: 36: + IC(0.318 ns) + CELL(0.088 ns) = 18.132 ns; Loc. = LC_X21_Y5_N0; Fanout = 1; COMB Node = 'BSblock:ChrisBS|reduce_nor~497'
        Info: 37: + IC(0.140 ns) + CELL(0.088 ns) = 18.360 ns; Loc. = LC_X21_Y5_N1; Fanout = 1; COMB Node = 'BSblock:ChrisBS|reduce_nor~498'
        Info: 38: + IC(0.140 ns) + CELL(0.088 ns) = 18.588 ns; Loc. = LC_X21_Y5_N2; Fanout = 16; COMB Node = 'BSblock:ChrisBS|reduce_nor~499'
        Info: 39: + IC(0.877 ns) + CELL(0.225 ns) = 19.690 ns; Loc. = LC_X19_Y5_N2; Fanout = 5; COMB Node = 'BSblock:ChrisBS|FeedbackDACOutput~1786'
        Info: 40: + IC(0.523 ns) + CELL(0.326 ns) = 20.539 ns; Loc. = LC_X20_Y5_N2; Fanout = 2; COMB Node = 'BSblock:ChrisBS|add~2183'
        Info: 41: + IC(0.000 ns) + CELL(0.060 ns) = 20.599 ns; Loc. = LC_X20_Y5_N3; Fanout = 2; COMB Node = 'BSblock:ChrisBS|add~2078'
        Info: 42: + IC(0.000 ns) + CELL(0.137 ns) = 20.736 ns; Loc. = LC_X20_Y5_N4; Fanout = 6; COMB Node = 'BSblock:ChrisBS|add~2083'
        Info: 43: + IC(0.000 ns) + CELL(0.478 ns) = 21.214 ns; Loc. = LC_X20_Y5_N5; Fanout = 2; COMB Node = 'BSblock:ChrisBS|add~2086'
        Info: 44: + IC(0.965 ns) + CELL(0.454 ns) = 22.633 ns; Loc. = LC_X19_Y4_N6; Fanout = 2; COMB Node = 'BSblock:ChrisBS|LessThan~1484'
        Info: 45: + IC(0.331 ns) + CELL(0.088 ns) = 23.052 ns; Loc. = LC_X19_Y4_N1; Fanout = 1; COMB Node = 'BSblock:ChrisBS|LessThan~1485'
        Info: 46: + IC(0.331 ns) + CELL(0.088 ns) = 23.471 ns; Loc. = LC_X19_Y4_N5; Fanout = 15; COMB Node = 'BSblock:ChrisBS|LessThan~1487'
        Info: 47: + IC(1.013 ns) + CELL(0.088 ns) = 24.572 ns; Loc. = LC_X19_Y5_N3; Fanout = 1; COMB Node = 'BSblock:ChrisBS|FeedbackDACOutput~1787'
        Info: 48: + IC(0.140 ns) + CELL(0.238 ns) = 24.950 ns; Loc. = LC_X19_Y5_N4; Fanout = 5; REG Node = 'BSblock:ChrisBS|FeedbackDACOutput[0]'
        Info: Total cell delay = 11.475 ns ( 45.99 % )
        Info: Total interconnect delay = 13.475 ns ( 54.01 % )
Warning: Can't achieve timing requirement Clock Setup: 'Clk' along 1342 path(s). See Report window for details.
Info: Minimum slack time is 633 ps for clock "Clk" between source register "BS2:ADChandler|CurrentPort[1]" and destination register "BS2:ADChandler|CurrentPort[1]"
    Info: + Shortest register to register delay is 0.472 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X11_Y5_N7; Fanout = 7; REG Node = 'BS2:ADChandler|CurrentPort[1]'
        Info: 2: + IC(0.000 ns) + CELL(0.472 ns) = 0.472 ns; Loc. = LC_X11_Y5_N7; Fanout = 7; REG Node = 'BS2:ADChandler|CurrentPort[1]'
        Info: Total cell delay = 0.472 ns ( 100.00 % )
    Info: - Smallest register to register requirement is -0.161 ns
        Info: + Hold relationship between source and destination is 0.000 ns
            Info: + Latch edge is 5.000 ns
                Info: Clock period of Destination clock "Clk" is 10.000 ns with , Inverted offset of 5.000 ns and duty cycle of 50
                Info: Multicycle Setup factor for Destination register is 1
                Info: Multicycle Hold factor for Destination register is 1
            Info: - Launch edge is 5.000 ns
                Info: Clock period of Source clock "Clk" is 10.000 ns with , Inverted offset of 5.000 ns and duty cycle of 50
                Info: Multicycle Setup factor for Source register is 1
                Info: Multicycle Hold factor for Source register is 1
        Info: + Smallest clock skew is 0.000 ns
            Info: + Longest clock path from clock "Clk" to destination register is 5.474 ns
                Info: 1: + IC(0.000 ns) + CELL(1.130 ns) = 1.130 ns; Loc. = PIN_10; Fanout = 267; CLK Node = 'Clk'
                Info: 2: + IC(0.429 ns) + CELL(0.720 ns) = 2.279 ns; Loc. = LC_X8_Y6_N2; Fanout = 147; REG Node = 'BSblock:ChrisBS|ADCClk'
                Info: 3: + IC(2.648 ns) + CELL(0.547 ns) = 5.474 ns; Loc. = LC_X11_Y5_N7; Fanout = 7; REG Node = 'BS2:ADChandler|CurrentPort[1]'
                Info: Total cell delay = 2.397 ns ( 43.79 % )
                Info: Total interconnect delay = 3.077 ns ( 56.21 % )
            Info: - Shortest clock path from clock "Clk" to source register is 5.474 ns
                Info: 1: + IC(0.000 ns) + CELL(1.130 ns) = 1.130 ns; Loc. = PIN_10; Fanout = 267; CLK Node = 'Clk'
                Info: 2: + IC(0.429 ns) + CELL(0.720 ns) = 2.279 ns; Loc. = LC_X8_Y6_N2; Fanout = 147; REG Node = 'BSblock:ChrisBS|ADCClk'
                Info: 3: + IC(2.648 ns) + CELL(0.547 ns) = 5.474 ns; Loc. = LC_X11_Y5_N7; Fanout = 7; REG Node = 'BS2:ADChandler|CurrentPort[1]'
                Info: Total cell delay = 2.397 ns ( 43.79 % )
                Info: Total interconnect delay = 3.077 ns ( 56.21 % )
        Info: - Micro clock to output delay of source is 0.173 ns
        Info: + Micro hold delay of destination is 0.012 ns
Info: tsu for register "BSSlow:inst|DACsData" (data pin = "USB[15]", clock pin = "Clk") is 8.806 ns
    Info: + Longest pin to register delay is 10.915 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_98; Fanout = 1; PIN Node = 'USB[15]'
        Info: 2: + IC(0.000 ns) + CELL(1.135 ns) = 1.135 ns; Loc. = IOC_X6_Y14_N1; Fanout = 48; COMB Node = 'BSblock:ChrisBS|Dig[0]'
        Info: 3: + IC(4.740 ns) + CELL(0.454 ns) = 6.329 ns; Loc. = LC_X11_Y9_N4; Fanout = 16; COMB Node = 'BSblock:ChrisBS|reduce_nor~492'
        Info: 4: + IC(1.928 ns) + CELL(0.225 ns) = 8.482 ns; Loc. = LC_X20_Y8_N0; Fanout = 1; COMB Node = 'BSSlow:inst|Select~4634'
        Info: 5: + IC(0.326 ns) + CELL(0.088 ns) = 8.896 ns; Loc. = LC_X20_Y8_N5; Fanout = 1; COMB Node = 'BSSlow:inst|Select~4635'
        Info: 6: + IC(0.324 ns) + CELL(0.088 ns) = 9.308 ns; Loc. = LC_X20_Y8_N8; Fanout = 1; COMB Node = 'BSSlow:inst|Select~4638'
        Info: 7: + IC(0.547 ns) + CELL(0.454 ns) = 10.309 ns; Loc. = LC_X19_Y8_N5; Fanout = 1; COMB Node = 'BSSlow:inst|Select~4644'
        Info: 8: + IC(0.140 ns) + CELL(0.088 ns) = 10.537 ns; Loc. = LC_X19_Y8_N6; Fanout = 1; COMB Node = 'BSSlow:inst|Select~4645'
        Info: 9: + IC(0.140 ns) + CELL(0.238 ns) = 10.915 ns; Loc. = LC_X19_Y8_N7; Fanout = 3; REG Node = 'BSSlow:inst|DACsData'
        Info: Total cell delay = 2.770 ns ( 25.38 % )
        Info: Total interconnect delay = 8.145 ns ( 74.62 % )
    Info: + Micro setup delay of destination is 0.029 ns
    Info: - Shortest clock path from clock "Clk" to destination register is 2.138 ns
        Info: 1: + IC(0.000 ns) + CELL(1.130 ns) = 1.130 ns; Loc. = PIN_10; Fanout = 267; CLK Node = 'Clk'
        Info: 2: + IC(0.461 ns) + CELL(0.547 ns) = 2.138 ns; Loc. = LC_X19_Y8_N7; Fanout = 3; REG Node = 'BSSlow:inst|DACsData'
        Info: Total cell delay = 1.677 ns ( 78.44 % )
        Info: Total interconnect delay = 0.461 ns ( 21.56 % )
Info: tco from clock "Clk" to destination pin "ADCsCS" through register "BS2:ADChandler|ADCsCS" is 9.476 ns
    Info: + Longest clock path from clock "Clk" to source register is 5.482 ns
        Info: 1: + IC(0.000 ns) + CELL(1.130 ns) = 1.130 ns; Loc. = PIN_10; Fanout = 267; CLK Node = 'Clk'
        Info: 2: + IC(0.429 ns) + CELL(0.720 ns) = 2.279 ns; Loc. = LC_X8_Y6_N2; Fanout = 147; REG Node = 'BSblock:ChrisBS|ADCClk'
        Info: 3: + IC(2.656 ns) + CELL(0.547 ns) = 5.482 ns; Loc. = LC_X10_Y6_N3; Fanout = 2; REG Node = 'BS2:ADChandler|ADCsCS'
        Info: Total cell delay = 2.397 ns ( 43.72 % )
        Info: Total interconnect delay = 3.085 ns ( 56.28 % )
    Info: + Micro clock to output delay of source is 0.173 ns
    Info: + Longest register to pin delay is 3.821 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X10_Y6_N3; Fanout = 2; REG Node = 'BS2:ADChandler|ADCsCS'
        Info: 2: + IC(2.199 ns) + CELL(1.622 ns) = 3.821 ns; Loc. = PIN_26; Fanout = 0; PIN Node = 'ADCsCS'
        Info: Total cell delay = 1.622 ns ( 42.45 % )
        Info: Total interconnect delay = 2.199 ns ( 57.55 % )
Info: Longest tpd from source pin "USB[15]" to destination pin "DACf[0]" is 12.140 ns
    Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_98; Fanout = 1; PIN Node = 'USB[15]'
    Info: 2: + IC(0.000 ns) + CELL(1.135 ns) = 1.135 ns; Loc. = IOC_X6_Y14_N1; Fanout = 48; COMB Node = 'BSblock:ChrisBS|Dig[0]'
    Info: 3: + IC(4.743 ns) + CELL(0.454 ns) = 6.332 ns; Loc. = LC_X11_Y9_N1; Fanout = 12; COMB Node = 'BSblock:ChrisBS|DACf~1122'
    Info: 4: + IC(2.021 ns) + CELL(0.088 ns) = 8.441 ns; Loc. = LC_X19_Y10_N2; Fanout = 1; COMB Node = 'BSblock:ChrisBS|DACf[0]~1134'
    Info: 5: + IC(2.065 ns) + CELL(1.634 ns) = 12.140 ns; Loc. = PIN_54; Fanout = 0; PIN Node = 'DACf[0]'
    Info: Total cell delay = 3.311 ns ( 27.27 % )
    Info: Total interconnect delay = 8.829 ns ( 72.73 % )
Info: th for register "BS2:ADChandler|Port6[5]" (data pin = "ADCsSDO", clock pin = "Clk") is -0.144 ns
    Info: + Longest clock path from clock "Clk" to destination register is 5.474 ns
        Info: 1: + IC(0.000 ns) + CELL(1.130 ns) = 1.130 ns; Loc. = PIN_10; Fanout = 267; CLK Node = 'Clk'
        Info: 2: + IC(0.429 ns) + CELL(0.720 ns) = 2.279 ns; Loc. = LC_X8_Y6_N2; Fanout = 147; REG Node = 'BSblock:ChrisBS|ADCClk'
        Info: 3: + IC(2.648 ns) + CELL(0.547 ns) = 5.474 ns; Loc. = LC_X6_Y5_N1; Fanout = 1; REG Node = 'BS2:ADChandler|Port6[5]'
        Info: Total cell delay = 2.397 ns ( 43.79 % )
        Info: Total interconnect delay = 3.077 ns ( 56.21 % )
    Info: + Micro hold delay of destination is 0.012 ns
    Info: - Shortest pin to register delay is 5.630 ns
        Info: 1: + IC(0.000 ns) + CELL(1.135 ns) = 1.135 ns; Loc. = PIN_27; Fanout = 128; PIN Node = 'ADCsSDO'
        Info: 2: + IC(4.406 ns) + CELL(0.089 ns) = 5.630 ns; Loc. = LC_X6_Y5_N1; Fanout = 1; REG Node = 'BS2:ADChandler|Port6[5]'
        Info: Total cell delay = 1.224 ns ( 21.74 % )
        Info: Total interconnect delay = 4.406 ns ( 78.26 % )
Critical Warning: Timing requirements were not met. See Report window for details.
Info: Quartus II Timing Analyzer was successful. 0 errors, 3 warnings
    Info: Processing ended: Mon Sep 19 16:00:33 2005
    Info: Elapsed time: 00:00:01


