Classic Timing Analyzer report for TopCoil
Tue Mar 25 17:52:00 2008
Quartus II Version 7.1 Build 178 06/25/2007 Service Pack 1 SJ Web Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Timing Analyzer Summary
  3. Timing Analyzer Settings
  4. Clock Settings Summary
  5. Clock Setup: 'Clock'
  6. tsu
  7. tco
  8. th
  9. Timing Analyzer Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2007 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Summary                                                                                                                                                                                                                                       ;
+------------------------------+-------+---------------+----------------------------------+----------------------------------------------------------------------------------------------+-------------------------------+------------+----------+--------------+
; Type                         ; Slack ; Required Time ; Actual Time                      ; From                                                                                         ; To                            ; From Clock ; To Clock ; Failed Paths ;
+------------------------------+-------+---------------+----------------------------------+----------------------------------------------------------------------------------------------+-------------------------------+------------+----------+--------------+
; Worst-case tsu               ; N/A   ; None          ; 4.291 ns                         ; Trigger                                                                                      ; uberTopCoil:inst4|RamAdd[7]   ; --         ; Clock    ; 0            ;
; Worst-case tco               ; N/A   ; None          ; 13.418 ns                        ; uberTopCoil:inst4|EnableXYdacs                                                               ; Phi[0]                        ; Clock      ; --       ; 0            ;
; Worst-case th                ; N/A   ; None          ; 0.539 ns                         ; Usb[10]                                                                                      ; uberTopCoil:inst4|RecField[1] ; --         ; Clock    ; 0            ;
; Clock Setup: 'Clock'         ; N/A   ; None          ; 108.39 MHz ( period = 9.226 ns ) ; Ram1Port:RecordHolder|altsyncram:altsyncram_component|altsyncram_r6a1:auto_generated|q_a[60] ; uberTopCoil:inst4|YRecDone    ; Clock      ; Clock    ; 0            ;
; Total number of failed paths ;       ;               ;                                  ;                                                                                              ;                               ;            ;          ; 0            ;
+------------------------------+-------+---------------+----------------------------------+----------------------------------------------------------------------------------------------+-------------------------------+------------+----------+--------------+


+------------------------------------------------------------------------------------------------------+
; Timing Analyzer Settings                                                                             ;
+-------------------------------------------------------+--------------------+------+----+-------------+
; Option                                                ; Setting            ; From ; To ; Entity Name ;
+-------------------------------------------------------+--------------------+------+----+-------------+
; Device Name                                           ; EP2C8T144C6        ;      ;    ;             ;
; Timing Models                                         ; Final              ;      ;    ;             ;
; Default hold multicycle                               ; Same as Multicycle ;      ;    ;             ;
; Cut paths between unrelated clock domains             ; On                 ;      ;    ;             ;
; Cut off read during write signal paths                ; On                 ;      ;    ;             ;
; Cut off feedback from I/O pins                        ; On                 ;      ;    ;             ;
; Report Combined Fast/Slow Timing                      ; Off                ;      ;    ;             ;
; Ignore Clock Settings                                 ; Off                ;      ;    ;             ;
; Analyze latches as synchronous elements               ; On                 ;      ;    ;             ;
; Enable Recovery/Removal analysis                      ; Off                ;      ;    ;             ;
; Enable Clock Latency                                  ; Off                ;      ;    ;             ;
; Number of source nodes to report per destination node ; 10                 ;      ;    ;             ;
; Number of destination nodes to report                 ; 10                 ;      ;    ;             ;
; Number of paths to report                             ; 200                ;      ;    ;             ;
; Report Minimum Timing Checks                          ; Off                ;      ;    ;             ;
; Use Fast Timing Models                                ; Off                ;      ;    ;             ;
; Report IO Paths Separately                            ; Off                ;      ;    ;             ;
+-------------------------------------------------------+--------------------+------+----+-------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary                                                                                                                                                             ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; Clock Node Name ; Clock Setting Name ; Type     ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ; Phase offset ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; Clock           ;                    ; User Pin ; None             ; 0.000 ns      ; 0.000 ns     ; --       ; N/A                   ; N/A                 ; N/A    ;              ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'Clock'                                                                                                                                                                                                                                                                                                                   ;
+-----------------------------------------+-----------------------------------------------------+----------------------------------------------------------------------------------------------+-----------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack                                   ; Actual fmax (period)                                ; From                                                                                         ; To                          ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+----------------------------------------------------------------------------------------------+-----------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A                                     ; 108.39 MHz ( period = 9.226 ns )                    ; Ram1Port:RecordHolder|altsyncram:altsyncram_component|altsyncram_r6a1:auto_generated|q_a[60] ; uberTopCoil:inst4|YRecDone  ; Clock      ; Clock    ; None                        ; None                      ; 8.989 ns                ;
; N/A                                     ; 109.24 MHz ( period = 9.154 ns )                    ; uberTopCoil:inst4|XStepCtr[2]                                                                ; uberTopCoil:inst4|XGain[8]  ; Clock      ; Clock    ; None                        ; None                      ; 8.916 ns                ;
; N/A                                     ; 109.58 MHz ( period = 9.126 ns )                    ; uberTopCoil:inst4|YClkCtr[0]                                                                 ; uberTopCoil:inst4|YRecDone  ; Clock      ; Clock    ; None                        ; None                      ; 8.901 ns                ;
; N/A                                     ; 110.13 MHz ( period = 9.080 ns )                    ; uberTopCoil:inst4|XStepCtr[2]                                                                ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.865 ns                ;
; N/A                                     ; 110.34 MHz ( period = 9.063 ns )                    ; uberTopCoil:inst4|XStepCtr[3]                                                                ; uberTopCoil:inst4|XGain[8]  ; Clock      ; Clock    ; None                        ; None                      ; 8.860 ns                ;
; N/A                                     ; 110.91 MHz ( period = 9.016 ns )                    ; uberTopCoil:inst4|XStepCtr[5]                                                                ; uberTopCoil:inst4|XGain[8]  ; Clock      ; Clock    ; None                        ; None                      ; 8.813 ns                ;
; N/A                                     ; 111.25 MHz ( period = 8.989 ns )                    ; uberTopCoil:inst4|XStepCtr[3]                                                                ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.809 ns                ;
; N/A                                     ; 111.51 MHz ( period = 8.968 ns )                    ; uberTopCoil:inst4|XStepCtr[4]                                                                ; uberTopCoil:inst4|XGain[8]  ; Clock      ; Clock    ; None                        ; None                      ; 8.765 ns                ;
; N/A                                     ; 111.54 MHz ( period = 8.965 ns )                    ; uberTopCoil:inst4|XStepCtr[0]                                                                ; uberTopCoil:inst4|XGain[8]  ; Clock      ; Clock    ; None                        ; None                      ; 8.727 ns                ;
; N/A                                     ; 111.76 MHz ( period = 8.948 ns )                    ; Ram1Port:RecordHolder|altsyncram:altsyncram_component|altsyncram_r6a1:auto_generated|q_a[26] ; uberTopCoil:inst4|XRecDone  ; Clock      ; Clock    ; None                        ; None                      ; 8.795 ns                ;
; N/A                                     ; 111.83 MHz ( period = 8.942 ns )                    ; uberTopCoil:inst4|XStepCtr[5]                                                                ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.762 ns                ;
; N/A                                     ; 111.91 MHz ( period = 8.936 ns )                    ; uberTopCoil:inst4|YRecDone                                                                   ; uberTopCoil:inst4|Gain[11]  ; Clock      ; Clock    ; None                        ; None                      ; 8.709 ns                ;
; N/A                                     ; 111.97 MHz ( period = 8.931 ns )                    ; uberTopCoil:inst4|XStepCtr[2]                                                                ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.701 ns                ;
; N/A                                     ; 112.10 MHz ( period = 8.921 ns )                    ; uberTopCoil:inst4|XClkCtr[9]                                                                 ; uberTopCoil:inst4|XGain[8]  ; Clock      ; Clock    ; None                        ; None                      ; 8.748 ns                ;
; N/A                                     ; 112.20 MHz ( period = 8.913 ns )                    ; uberTopCoil:inst4|XRecDone                                                                   ; uberTopCoil:inst4|XGain[8]  ; Clock      ; Clock    ; None                        ; None                      ; 8.675 ns                ;
; N/A                                     ; 112.23 MHz ( period = 8.910 ns )                    ; uberTopCoil:inst4|XStepCtr[11]                                                               ; uberTopCoil:inst4|XGain[8]  ; Clock      ; Clock    ; None                        ; None                      ; 8.660 ns                ;
; N/A                                     ; 112.38 MHz ( period = 8.898 ns )                    ; uberTopCoil:inst4|YClkCtr[1]                                                                 ; uberTopCoil:inst4|YRecDone  ; Clock      ; Clock    ; None                        ; None                      ; 8.673 ns                ;
; N/A                                     ; 112.44 MHz ( period = 8.894 ns )                    ; uberTopCoil:inst4|XStepCtr[4]                                                                ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.714 ns                ;
; N/A                                     ; 112.47 MHz ( period = 8.891 ns )                    ; uberTopCoil:inst4|XStepCtr[0]                                                                ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.676 ns                ;
; N/A                                     ; 112.52 MHz ( period = 8.887 ns )                    ; Ram1Port:RecordHolder|altsyncram:altsyncram_component|altsyncram_r6a1:auto_generated|q_a[27] ; uberTopCoil:inst4|XRecDone  ; Clock      ; Clock    ; None                        ; None                      ; 8.734 ns                ;
; N/A                                     ; 112.56 MHz ( period = 8.884 ns )                    ; uberTopCoil:inst4|YStepCtr[11]                                                               ; uberTopCoil:inst4|Gain[11]  ; Clock      ; Clock    ; None                        ; None                      ; 8.646 ns                ;
; N/A                                     ; 112.59 MHz ( period = 8.882 ns )                    ; uberTopCoil:inst4|XClkCtr[3]                                                                 ; uberTopCoil:inst4|XGain[8]  ; Clock      ; Clock    ; None                        ; None                      ; 8.712 ns                ;
; N/A                                     ; 112.75 MHz ( period = 8.869 ns )                    ; Ram1Port:RecordHolder|altsyncram:altsyncram_component|altsyncram_r6a1:auto_generated|q_a[24] ; uberTopCoil:inst4|XRecDone  ; Clock      ; Clock    ; None                        ; None                      ; 8.710 ns                ;
; N/A                                     ; 112.82 MHz ( period = 8.864 ns )                    ; uberTopCoil:inst4|YClkCtr[0]                                                                 ; uberTopCoil:inst4|Gain[11]  ; Clock      ; Clock    ; None                        ; None                      ; 8.626 ns                ;
; N/A                                     ; 112.88 MHz ( period = 8.859 ns )                    ; Ram1Port:RecordHolder|altsyncram:altsyncram_component|altsyncram_r6a1:auto_generated|q_a[28] ; uberTopCoil:inst4|XRecDone  ; Clock      ; Clock    ; None                        ; None                      ; 8.706 ns                ;
; N/A                                     ; 112.88 MHz ( period = 8.859 ns )                    ; uberTopCoil:inst4|YRecDone                                                                   ; uberTopCoil:inst4|Gain[9]   ; Clock      ; Clock    ; None                        ; None                      ; 8.664 ns                ;
; N/A                                     ; 112.93 MHz ( period = 8.855 ns )                    ; uberTopCoil:inst4|YRecDone                                                                   ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.675 ns                ;
; N/A                                     ; 113.01 MHz ( period = 8.849 ns )                    ; Ram1Port:RecordHolder|altsyncram:altsyncram_component|altsyncram_r6a1:auto_generated|q_a[65] ; uberTopCoil:inst4|YRecDone  ; Clock      ; Clock    ; None                        ; None                      ; 8.607 ns                ;
; N/A                                     ; 113.03 MHz ( period = 8.847 ns )                    ; uberTopCoil:inst4|XClkCtr[9]                                                                 ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.697 ns                ;
; N/A                                     ; 113.12 MHz ( period = 8.840 ns )                    ; uberTopCoil:inst4|XStepCtr[3]                                                                ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.645 ns                ;
; N/A                                     ; 113.13 MHz ( period = 8.839 ns )                    ; uberTopCoil:inst4|XRecDone                                                                   ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.624 ns                ;
; N/A                                     ; 113.13 MHz ( period = 8.839 ns )                    ; uberTopCoil:inst4|YRecDone                                                                   ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.644 ns                ;
; N/A                                     ; 113.15 MHz ( period = 8.838 ns )                    ; uberTopCoil:inst4|XClkCtr[10]                                                                ; uberTopCoil:inst4|XGain[8]  ; Clock      ; Clock    ; None                        ; None                      ; 8.665 ns                ;
; N/A                                     ; 113.17 MHz ( period = 8.836 ns )                    ; uberTopCoil:inst4|XStepCtr[11]                                                               ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.609 ns                ;
; N/A                                     ; 113.43 MHz ( period = 8.816 ns )                    ; uberTopCoil:inst4|XStepCtr[7]                                                                ; uberTopCoil:inst4|XGain[8]  ; Clock      ; Clock    ; None                        ; None                      ; 8.625 ns                ;
; N/A                                     ; 113.51 MHz ( period = 8.810 ns )                    ; uberTopCoil:inst4|YClkCtr[2]                                                                 ; uberTopCoil:inst4|YRecDone  ; Clock      ; Clock    ; None                        ; None                      ; 8.585 ns                ;
; N/A                                     ; 113.53 MHz ( period = 8.808 ns )                    ; uberTopCoil:inst4|YStepCtr[5]                                                                ; uberTopCoil:inst4|Gain[11]  ; Clock      ; Clock    ; None                        ; None                      ; 8.582 ns                ;
; N/A                                     ; 113.53 MHz ( period = 8.808 ns )                    ; uberTopCoil:inst4|XClkCtr[3]                                                                 ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.661 ns                ;
; N/A                                     ; 113.55 MHz ( period = 8.807 ns )                    ; uberTopCoil:inst4|YStepCtr[11]                                                               ; uberTopCoil:inst4|Gain[9]   ; Clock      ; Clock    ; None                        ; None                      ; 8.601 ns                ;
; N/A                                     ; 113.60 MHz ( period = 8.803 ns )                    ; uberTopCoil:inst4|YStepCtr[11]                                                               ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.612 ns                ;
; N/A                                     ; 113.61 MHz ( period = 8.802 ns )                    ; Ram1Port:RecordHolder|altsyncram:altsyncram_component|altsyncram_r6a1:auto_generated|q_a[25] ; uberTopCoil:inst4|XRecDone  ; Clock      ; Clock    ; None                        ; None                      ; 8.643 ns                ;
; N/A                                     ; 113.62 MHz ( period = 8.801 ns )                    ; uberTopCoil:inst4|XClkCtr[7]                                                                 ; uberTopCoil:inst4|XGain[8]  ; Clock      ; Clock    ; None                        ; None                      ; 8.628 ns                ;
; N/A                                     ; 113.65 MHz ( period = 8.799 ns )                    ; Ram1Port:RecordHolder|altsyncram:altsyncram_component|altsyncram_r6a1:auto_generated|q_a[61] ; uberTopCoil:inst4|YRecDone  ; Clock      ; Clock    ; None                        ; None                      ; 8.582 ns                ;
; N/A                                     ; 113.65 MHz ( period = 8.799 ns )                    ; uberTopCoil:inst4|YRecDone                                                                   ; uberTopCoil:inst4|Gain[7]   ; Clock      ; Clock    ; None                        ; None                      ; 8.612 ns                ;
; N/A                                     ; 113.73 MHz ( period = 8.793 ns )                    ; uberTopCoil:inst4|XStepCtr[5]                                                                ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.598 ns                ;
; N/A                                     ; 113.74 MHz ( period = 8.792 ns )                    ; uberTopCoil:inst4|XStepCtr[6]                                                                ; uberTopCoil:inst4|XGain[8]  ; Clock      ; Clock    ; None                        ; None                      ; 8.589 ns                ;
; N/A                                     ; 113.80 MHz ( period = 8.787 ns )                    ; uberTopCoil:inst4|YClkCtr[0]                                                                 ; uberTopCoil:inst4|Gain[9]   ; Clock      ; Clock    ; None                        ; None                      ; 8.581 ns                ;
; N/A                                     ; 113.80 MHz ( period = 8.787 ns )                    ; uberTopCoil:inst4|YStepCtr[11]                                                               ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.581 ns                ;
; N/A                                     ; 113.86 MHz ( period = 8.783 ns )                    ; uberTopCoil:inst4|YClkCtr[0]                                                                 ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.592 ns                ;
; N/A                                     ; 113.87 MHz ( period = 8.782 ns )                    ; Ram1Port:RecordHolder|altsyncram:altsyncram_component|altsyncram_r6a1:auto_generated|q_a[66] ; uberTopCoil:inst4|YRecDone  ; Clock      ; Clock    ; None                        ; None                      ; 8.540 ns                ;
; N/A                                     ; 114.06 MHz ( period = 8.767 ns )                    ; uberTopCoil:inst4|YClkCtr[0]                                                                 ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.561 ns                ;
; N/A                                     ; 114.09 MHz ( period = 8.765 ns )                    ; uberTopCoil:inst4|XStepCtr[8]                                                                ; uberTopCoil:inst4|XGain[8]  ; Clock      ; Clock    ; None                        ; None                      ; 8.574 ns                ;
; N/A                                     ; 114.10 MHz ( period = 8.764 ns )                    ; uberTopCoil:inst4|XClkCtr[10]                                                                ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.614 ns                ;
; N/A                                     ; 114.17 MHz ( period = 8.759 ns )                    ; uberTopCoil:inst4|YStepCtr[7]                                                                ; uberTopCoil:inst4|Gain[11]  ; Clock      ; Clock    ; None                        ; None                      ; 8.514 ns                ;
; N/A                                     ; 114.32 MHz ( period = 8.747 ns )                    ; uberTopCoil:inst4|XClkCtr[0]                                                                 ; uberTopCoil:inst4|XGain[8]  ; Clock      ; Clock    ; None                        ; None                      ; 8.574 ns                ;
; N/A                                     ; 114.32 MHz ( period = 8.747 ns )                    ; uberTopCoil:inst4|YStepCtr[11]                                                               ; uberTopCoil:inst4|Gain[7]   ; Clock      ; Clock    ; None                        ; None                      ; 8.549 ns                ;
; N/A                                     ; 114.35 MHz ( period = 8.745 ns )                    ; uberTopCoil:inst4|XStepCtr[4]                                                                ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.550 ns                ;
; N/A                                     ; 114.36 MHz ( period = 8.744 ns )                    ; Ram1Port:RecordHolder|altsyncram:altsyncram_component|altsyncram_r6a1:auto_generated|q_a[34] ; uberTopCoil:inst4|XRecDone  ; Clock      ; Clock    ; None                        ; None                      ; 8.544 ns                ;
; N/A                                     ; 114.39 MHz ( period = 8.742 ns )                    ; uberTopCoil:inst4|XStepCtr[7]                                                                ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.574 ns                ;
; N/A                                     ; 114.39 MHz ( period = 8.742 ns )                    ; uberTopCoil:inst4|XStepCtr[0]                                                                ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.512 ns                ;
; N/A                                     ; 114.42 MHz ( period = 8.740 ns )                    ; Ram1Port:RecordHolder|altsyncram:altsyncram_component|altsyncram_r6a1:auto_generated|q_a[62] ; uberTopCoil:inst4|YRecDone  ; Clock      ; Clock    ; None                        ; None                      ; 8.523 ns                ;
; N/A                                     ; 114.43 MHz ( period = 8.739 ns )                    ; uberTopCoil:inst4|YClkCtr[2]                                                                 ; uberTopCoil:inst4|Gain[11]  ; Clock      ; Clock    ; None                        ; None                      ; 8.501 ns                ;
; N/A                                     ; 114.46 MHz ( period = 8.737 ns )                    ; uberTopCoil:inst4|XStepCtr[1]                                                                ; uberTopCoil:inst4|XGain[8]  ; Clock      ; Clock    ; None                        ; None                      ; 8.499 ns                ;
; N/A                                     ; 114.48 MHz ( period = 8.735 ns )                    ; uberTopCoil:inst4|YStepCtr[9]                                                                ; uberTopCoil:inst4|Gain[11]  ; Clock      ; Clock    ; None                        ; None                      ; 8.491 ns                ;
; N/A                                     ; 114.53 MHz ( period = 8.731 ns )                    ; uberTopCoil:inst4|YStepCtr[5]                                                                ; uberTopCoil:inst4|Gain[9]   ; Clock      ; Clock    ; None                        ; None                      ; 8.537 ns                ;
; N/A                                     ; 114.59 MHz ( period = 8.727 ns )                    ; uberTopCoil:inst4|XClkCtr[7]                                                                 ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.577 ns                ;
; N/A                                     ; 114.59 MHz ( period = 8.727 ns )                    ; uberTopCoil:inst4|YStepCtr[5]                                                                ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.548 ns                ;
; N/A                                     ; 114.59 MHz ( period = 8.727 ns )                    ; uberTopCoil:inst4|YClkCtr[0]                                                                 ; uberTopCoil:inst4|Gain[7]   ; Clock      ; Clock    ; None                        ; None                      ; 8.529 ns                ;
; N/A                                     ; 114.71 MHz ( period = 8.718 ns )                    ; uberTopCoil:inst4|XStepCtr[6]                                                                ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.538 ns                ;
; N/A                                     ; 114.72 MHz ( period = 8.717 ns )                    ; Ram1Port:RecordHolder|altsyncram:altsyncram_component|altsyncram_r6a1:auto_generated|q_a[63] ; uberTopCoil:inst4|YRecDone  ; Clock      ; Clock    ; None                        ; None                      ; 8.500 ns                ;
; N/A                                     ; 114.78 MHz ( period = 8.712 ns )                    ; uberTopCoil:inst4|YStepCtr[8]                                                                ; uberTopCoil:inst4|Gain[11]  ; Clock      ; Clock    ; None                        ; None                      ; 8.518 ns                ;
; N/A                                     ; 114.80 MHz ( period = 8.711 ns )                    ; uberTopCoil:inst4|YStepCtr[5]                                                                ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.517 ns                ;
; N/A                                     ; 114.85 MHz ( period = 8.707 ns )                    ; uberTopCoil:inst4|YStepCtr[3]                                                                ; uberTopCoil:inst4|Gain[11]  ; Clock      ; Clock    ; None                        ; None                      ; 8.481 ns                ;
; N/A                                     ; 114.88 MHz ( period = 8.705 ns )                    ; uberTopCoil:inst4|XStepCtr[2]                                                                ; uberTopCoil:inst4|Gain[9]   ; Clock      ; Clock    ; None                        ; None                      ; 8.475 ns                ;
; N/A                                     ; 114.97 MHz ( period = 8.698 ns )                    ; uberTopCoil:inst4|XClkCtr[9]                                                                 ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.533 ns                ;
; N/A                                     ; 115.06 MHz ( period = 8.691 ns )                    ; uberTopCoil:inst4|YStepCtr[6]                                                                ; uberTopCoil:inst4|Gain[11]  ; Clock      ; Clock    ; None                        ; None                      ; 8.494 ns                ;
; N/A                                     ; 115.06 MHz ( period = 8.691 ns )                    ; Ram1Port:RecordHolder|altsyncram:altsyncram_component|altsyncram_r6a1:auto_generated|q_a[69] ; uberTopCoil:inst4|YRecDone  ; Clock      ; Clock    ; None                        ; None                      ; 8.448 ns                ;
; N/A                                     ; 115.06 MHz ( period = 8.691 ns )                    ; uberTopCoil:inst4|XStepCtr[8]                                                                ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.523 ns                ;
; N/A                                     ; 115.07 MHz ( period = 8.690 ns )                    ; uberTopCoil:inst4|XRecDone                                                                   ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.460 ns                ;
; N/A                                     ; 115.11 MHz ( period = 8.687 ns )                    ; uberTopCoil:inst4|XStepCtr[11]                                                               ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.445 ns                ;
; N/A                                     ; 115.14 MHz ( period = 8.685 ns )                    ; Ram1Port:RecordHolder|altsyncram:altsyncram_component|altsyncram_r6a1:auto_generated|q_a[30] ; uberTopCoil:inst4|XRecDone  ; Clock      ; Clock    ; None                        ; None                      ; 8.484 ns                ;
; N/A                                     ; 115.18 MHz ( period = 8.682 ns )                    ; Ram1Port:RecordHolder|altsyncram:altsyncram_component|altsyncram_r6a1:auto_generated|q_a[29] ; uberTopCoil:inst4|XRecDone  ; Clock      ; Clock    ; None                        ; None                      ; 8.529 ns                ;
; N/A                                     ; 115.18 MHz ( period = 8.682 ns )                    ; uberTopCoil:inst4|YStepCtr[7]                                                                ; uberTopCoil:inst4|Gain[9]   ; Clock      ; Clock    ; None                        ; None                      ; 8.469 ns                ;
; N/A                                     ; 115.23 MHz ( period = 8.678 ns )                    ; uberTopCoil:inst4|YStepCtr[7]                                                                ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.480 ns                ;
; N/A                                     ; 115.30 MHz ( period = 8.673 ns )                    ; uberTopCoil:inst4|XClkCtr[0]                                                                 ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.523 ns                ;
; N/A                                     ; 115.31 MHz ( period = 8.672 ns )                    ; uberTopCoil:inst4|XStepCtr[10]                                                               ; uberTopCoil:inst4|XGain[8]  ; Clock      ; Clock    ; None                        ; None                      ; 8.481 ns                ;
; N/A                                     ; 115.33 MHz ( period = 8.671 ns )                    ; uberTopCoil:inst4|YStepCtr[5]                                                                ; uberTopCoil:inst4|Gain[7]   ; Clock      ; Clock    ; None                        ; None                      ; 8.485 ns                ;
; N/A                                     ; 115.35 MHz ( period = 8.669 ns )                    ; uberTopCoil:inst4|YClkCtr[3]                                                                 ; uberTopCoil:inst4|YRecDone  ; Clock      ; Clock    ; None                        ; None                      ; 8.438 ns                ;
; N/A                                     ; 115.43 MHz ( period = 8.663 ns )                    ; uberTopCoil:inst4|XStepCtr[1]                                                                ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.448 ns                ;
; N/A                                     ; 115.45 MHz ( period = 8.662 ns )                    ; uberTopCoil:inst4|YClkCtr[2]                                                                 ; uberTopCoil:inst4|Gain[9]   ; Clock      ; Clock    ; None                        ; None                      ; 8.456 ns                ;
; N/A                                     ; 115.45 MHz ( period = 8.662 ns )                    ; uberTopCoil:inst4|YStepCtr[7]                                                                ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.449 ns                ;
; N/A                                     ; 115.47 MHz ( period = 8.660 ns )                    ; uberTopCoil:inst4|YStepCtr[0]                                                                ; uberTopCoil:inst4|Gain[11]  ; Clock      ; Clock    ; None                        ; None                      ; 8.433 ns                ;
; N/A                                     ; 115.49 MHz ( period = 8.659 ns )                    ; uberTopCoil:inst4|XClkCtr[3]                                                                 ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.497 ns                ;
; N/A                                     ; 115.50 MHz ( period = 8.658 ns )                    ; uberTopCoil:inst4|YClkCtr[2]                                                                 ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.467 ns                ;
; N/A                                     ; 115.50 MHz ( period = 8.658 ns )                    ; uberTopCoil:inst4|YStepCtr[9]                                                                ; uberTopCoil:inst4|Gain[9]   ; Clock      ; Clock    ; None                        ; None                      ; 8.446 ns                ;
; N/A                                     ; 115.55 MHz ( period = 8.654 ns )                    ; uberTopCoil:inst4|YStepCtr[9]                                                                ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.457 ns                ;
; N/A                                     ; 115.71 MHz ( period = 8.642 ns )                    ; uberTopCoil:inst4|YClkCtr[2]                                                                 ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.436 ns                ;
; N/A                                     ; 115.74 MHz ( period = 8.640 ns )                    ; Ram1Port:RecordHolder|altsyncram:altsyncram_component|altsyncram_r6a1:auto_generated|q_a[31] ; uberTopCoil:inst4|XRecDone  ; Clock      ; Clock    ; None                        ; None                      ; 8.439 ns                ;
; N/A                                     ; 115.75 MHz ( period = 8.639 ns )                    ; Ram1Port:RecordHolder|altsyncram:altsyncram_component|altsyncram_r6a1:auto_generated|q_a[67] ; uberTopCoil:inst4|YRecDone  ; Clock      ; Clock    ; None                        ; None                      ; 8.397 ns                ;
; N/A                                     ; 115.77 MHz ( period = 8.638 ns )                    ; uberTopCoil:inst4|YStepCtr[9]                                                                ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.426 ns                ;
; N/A                                     ; 115.81 MHz ( period = 8.635 ns )                    ; uberTopCoil:inst4|YStepCtr[8]                                                                ; uberTopCoil:inst4|Gain[9]   ; Clock      ; Clock    ; None                        ; None                      ; 8.473 ns                ;
; N/A                                     ; 115.83 MHz ( period = 8.633 ns )                    ; uberTopCoil:inst4|YStepCtr[1]                                                                ; uberTopCoil:inst4|Gain[11]  ; Clock      ; Clock    ; None                        ; None                      ; 8.407 ns                ;
; N/A                                     ; 115.86 MHz ( period = 8.631 ns )                    ; uberTopCoil:inst4|YStepCtr[4]                                                                ; uberTopCoil:inst4|Gain[11]  ; Clock      ; Clock    ; None                        ; None                      ; 8.405 ns                ;
; N/A                                     ; 115.86 MHz ( period = 8.631 ns )                    ; uberTopCoil:inst4|YStepCtr[8]                                                                ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.484 ns                ;
; N/A                                     ; 115.87 MHz ( period = 8.630 ns )                    ; uberTopCoil:inst4|YStepCtr[3]                                                                ; uberTopCoil:inst4|Gain[9]   ; Clock      ; Clock    ; None                        ; None                      ; 8.436 ns                ;
; N/A                                     ; 115.93 MHz ( period = 8.626 ns )                    ; uberTopCoil:inst4|YStepCtr[3]                                                                ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.447 ns                ;
; N/A                                     ; 115.96 MHz ( period = 8.624 ns )                    ; uberTopCoil:inst4|YStepCtr[10]                                                               ; uberTopCoil:inst4|Gain[11]  ; Clock      ; Clock    ; None                        ; None                      ; 8.386 ns                ;
; N/A                                     ; 115.96 MHz ( period = 8.624 ns )                    ; uberTopCoil:inst4|XClkCtr[1]                                                                 ; uberTopCoil:inst4|XGain[8]  ; Clock      ; Clock    ; None                        ; None                      ; 8.451 ns                ;
; N/A                                     ; 115.98 MHz ( period = 8.622 ns )                    ; uberTopCoil:inst4|YStepCtr[7]                                                                ; uberTopCoil:inst4|Gain[7]   ; Clock      ; Clock    ; None                        ; None                      ; 8.417 ns                ;
; N/A                                     ; 116.06 MHz ( period = 8.616 ns )                    ; uberTopCoil:inst4|YClkCtr[1]                                                                 ; uberTopCoil:inst4|Gain[11]  ; Clock      ; Clock    ; None                        ; None                      ; 8.378 ns                ;
; N/A                                     ; 116.06 MHz ( period = 8.616 ns )                    ; Ram1Port:RecordHolder|altsyncram:altsyncram_component|altsyncram_r6a1:auto_generated|q_a[64] ; uberTopCoil:inst4|YRecDone  ; Clock      ; Clock    ; None                        ; None                      ; 8.399 ns                ;
; N/A                                     ; 116.08 MHz ( period = 8.615 ns )                    ; uberTopCoil:inst4|XClkCtr[10]                                                                ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.450 ns                ;
; N/A                                     ; 116.08 MHz ( period = 8.615 ns )                    ; uberTopCoil:inst4|YStepCtr[8]                                                                ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.453 ns                ;
; N/A                                     ; 116.09 MHz ( period = 8.614 ns )                    ; uberTopCoil:inst4|XStepCtr[3]                                                                ; uberTopCoil:inst4|Gain[9]   ; Clock      ; Clock    ; None                        ; None                      ; 8.419 ns                ;
; N/A                                     ; 116.09 MHz ( period = 8.614 ns )                    ; uberTopCoil:inst4|YStepCtr[6]                                                                ; uberTopCoil:inst4|Gain[9]   ; Clock      ; Clock    ; None                        ; None                      ; 8.449 ns                ;
; N/A                                     ; 116.09 MHz ( period = 8.614 ns )                    ; uberTopCoil:inst4|YRecDone                                                                   ; uberTopCoil:inst4|Gain[3]   ; Clock      ; Clock    ; None                        ; None                      ; 8.426 ns                ;
; N/A                                     ; 116.12 MHz ( period = 8.612 ns )                    ; uberTopCoil:inst4|XClkCtr[6]                                                                 ; uberTopCoil:inst4|XGain[8]  ; Clock      ; Clock    ; None                        ; None                      ; 8.442 ns                ;
; N/A                                     ; 116.14 MHz ( period = 8.610 ns )                    ; uberTopCoil:inst4|YStepCtr[6]                                                                ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.460 ns                ;
; N/A                                     ; 116.14 MHz ( period = 8.610 ns )                    ; uberTopCoil:inst4|YStepCtr[3]                                                                ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.416 ns                ;
; N/A                                     ; 116.16 MHz ( period = 8.609 ns )                    ; uberTopCoil:inst4|YClkCtr[7]                                                                 ; uberTopCoil:inst4|Gain[11]  ; Clock      ; Clock    ; None                        ; None                      ; 8.364 ns                ;
; N/A                                     ; 116.21 MHz ( period = 8.605 ns )                    ; uberTopCoil:inst4|YRecDone                                                                   ; uberTopCoil:inst4|YGain[9]  ; Clock      ; Clock    ; None                        ; None                      ; 8.410 ns                ;
; N/A                                     ; 116.25 MHz ( period = 8.602 ns )                    ; uberTopCoil:inst4|YClkCtr[2]                                                                 ; uberTopCoil:inst4|Gain[7]   ; Clock      ; Clock    ; None                        ; None                      ; 8.404 ns                ;
; N/A                                     ; 116.31 MHz ( period = 8.598 ns )                    ; uberTopCoil:inst4|XStepCtr[10]                                                               ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.430 ns                ;
; N/A                                     ; 116.31 MHz ( period = 8.598 ns )                    ; uberTopCoil:inst4|YStepCtr[9]                                                                ; uberTopCoil:inst4|Gain[7]   ; Clock      ; Clock    ; None                        ; None                      ; 8.394 ns                ;
; N/A                                     ; 116.36 MHz ( period = 8.594 ns )                    ; uberTopCoil:inst4|YStepCtr[6]                                                                ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.429 ns                ;
; N/A                                     ; 116.37 MHz ( period = 8.593 ns )                    ; uberTopCoil:inst4|XStepCtr[7]                                                                ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.410 ns                ;
; N/A                                     ; 116.51 MHz ( period = 8.583 ns )                    ; uberTopCoil:inst4|YStepCtr[0]                                                                ; uberTopCoil:inst4|Gain[9]   ; Clock      ; Clock    ; None                        ; None                      ; 8.388 ns                ;
; N/A                                     ; 116.54 MHz ( period = 8.581 ns )                    ; uberTopCoil:inst4|YRecDone                                                                   ; uberTopCoil:inst4|Gain[5]   ; Clock      ; Clock    ; None                        ; None                      ; 8.356 ns                ;
; N/A                                     ; 116.56 MHz ( period = 8.579 ns )                    ; uberTopCoil:inst4|YStepCtr[0]                                                                ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.399 ns                ;
; N/A                                     ; 116.58 MHz ( period = 8.578 ns )                    ; uberTopCoil:inst4|XClkCtr[7]                                                                 ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.413 ns                ;
; N/A                                     ; 116.62 MHz ( period = 8.575 ns )                    ; uberTopCoil:inst4|YClkCtr[5]                                                                 ; uberTopCoil:inst4|YRecDone  ; Clock      ; Clock    ; None                        ; None                      ; 8.344 ns                ;
; N/A                                     ; 116.62 MHz ( period = 8.575 ns )                    ; uberTopCoil:inst4|YStepCtr[8]                                                                ; uberTopCoil:inst4|Gain[7]   ; Clock      ; Clock    ; None                        ; None                      ; 8.421 ns                ;
; N/A                                     ; 116.67 MHz ( period = 8.571 ns )                    ; uberTopCoil:inst4|YClkCtr[10]                                                                ; uberTopCoil:inst4|Gain[11]  ; Clock      ; Clock    ; None                        ; None                      ; 8.326 ns                ;
; N/A                                     ; 116.67 MHz ( period = 8.571 ns )                    ; uberTopCoil:inst4|YClkCtr[4]                                                                 ; uberTopCoil:inst4|YRecDone  ; Clock      ; Clock    ; None                        ; None                      ; 8.340 ns                ;
; N/A                                     ; 116.69 MHz ( period = 8.570 ns )                    ; uberTopCoil:inst4|YStepCtr[3]                                                                ; uberTopCoil:inst4|Gain[7]   ; Clock      ; Clock    ; None                        ; None                      ; 8.384 ns                ;
; N/A                                     ; 116.70 MHz ( period = 8.569 ns )                    ; uberTopCoil:inst4|XStepCtr[6]                                                                ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.374 ns                ;
; N/A                                     ; 116.73 MHz ( period = 8.567 ns )                    ; uberTopCoil:inst4|XStepCtr[5]                                                                ; uberTopCoil:inst4|Gain[9]   ; Clock      ; Clock    ; None                        ; None                      ; 8.372 ns                ;
; N/A                                     ; 116.78 MHz ( period = 8.563 ns )                    ; uberTopCoil:inst4|YStepCtr[0]                                                                ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.368 ns                ;
; N/A                                     ; 116.80 MHz ( period = 8.562 ns )                    ; uberTopCoil:inst4|YStepCtr[11]                                                               ; uberTopCoil:inst4|Gain[3]   ; Clock      ; Clock    ; None                        ; None                      ; 8.363 ns                ;
; N/A                                     ; 116.81 MHz ( period = 8.561 ns )                    ; uberTopCoil:inst4|XClkCtr[8]                                                                 ; uberTopCoil:inst4|XGain[8]  ; Clock      ; Clock    ; None                        ; None                      ; 8.388 ns                ;
; N/A                                     ; 116.88 MHz ( period = 8.556 ns )                    ; uberTopCoil:inst4|YStepCtr[1]                                                                ; uberTopCoil:inst4|Gain[9]   ; Clock      ; Clock    ; None                        ; None                      ; 8.362 ns                ;
; N/A                                     ; 116.90 MHz ( period = 8.554 ns )                    ; uberTopCoil:inst4|YStepCtr[4]                                                                ; uberTopCoil:inst4|Gain[9]   ; Clock      ; Clock    ; None                        ; None                      ; 8.360 ns                ;
; N/A                                     ; 116.90 MHz ( period = 8.554 ns )                    ; uberTopCoil:inst4|YStepCtr[6]                                                                ; uberTopCoil:inst4|Gain[7]   ; Clock      ; Clock    ; None                        ; None                      ; 8.397 ns                ;
; N/A                                     ; 116.92 MHz ( period = 8.553 ns )                    ; uberTopCoil:inst4|YStepCtr[11]                                                               ; uberTopCoil:inst4|YGain[9]  ; Clock      ; Clock    ; None                        ; None                      ; 8.347 ns                ;
; N/A                                     ; 116.93 MHz ( period = 8.552 ns )                    ; uberTopCoil:inst4|YStepCtr[1]                                                                ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.373 ns                ;
; N/A                                     ; 116.96 MHz ( period = 8.550 ns )                    ; Ram1Port:RecordHolder|altsyncram:altsyncram_component|altsyncram_r6a1:auto_generated|q_a[68] ; uberTopCoil:inst4|YRecDone  ; Clock      ; Clock    ; None                        ; None                      ; 8.308 ns                ;
; N/A                                     ; 116.96 MHz ( period = 8.550 ns )                    ; uberTopCoil:inst4|XClkCtr[1]                                                                 ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.400 ns                ;
; N/A                                     ; 116.96 MHz ( period = 8.550 ns )                    ; uberTopCoil:inst4|YStepCtr[4]                                                                ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.371 ns                ;
; N/A                                     ; 117.00 MHz ( period = 8.547 ns )                    ; uberTopCoil:inst4|YStepCtr[10]                                                               ; uberTopCoil:inst4|Gain[9]   ; Clock      ; Clock    ; None                        ; None                      ; 8.341 ns                ;
; N/A                                     ; 117.04 MHz ( period = 8.544 ns )                    ; uberTopCoil:inst4|XStepCtr[9]                                                                ; uberTopCoil:inst4|XGain[8]  ; Clock      ; Clock    ; None                        ; None                      ; 8.353 ns                ;
; N/A                                     ; 117.05 MHz ( period = 8.543 ns )                    ; uberTopCoil:inst4|YStepCtr[2]                                                                ; uberTopCoil:inst4|Gain[11]  ; Clock      ; Clock    ; None                        ; None                      ; 8.317 ns                ;
; N/A                                     ; 117.05 MHz ( period = 8.543 ns )                    ; uberTopCoil:inst4|YStepCtr[10]                                                               ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.352 ns                ;
; N/A                                     ; 117.07 MHz ( period = 8.542 ns )                    ; uberTopCoil:inst4|XStepCtr[8]                                                                ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.359 ns                ;
; N/A                                     ; 117.07 MHz ( period = 8.542 ns )                    ; uberTopCoil:inst4|YClkCtr[0]                                                                 ; uberTopCoil:inst4|Gain[3]   ; Clock      ; Clock    ; None                        ; None                      ; 8.343 ns                ;
; N/A                                     ; 117.11 MHz ( period = 8.539 ns )                    ; uberTopCoil:inst4|YClkCtr[1]                                                                 ; uberTopCoil:inst4|Gain[9]   ; Clock      ; Clock    ; None                        ; None                      ; 8.333 ns                ;
; N/A                                     ; 117.12 MHz ( period = 8.538 ns )                    ; uberTopCoil:inst4|XClkCtr[6]                                                                 ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.391 ns                ;
; N/A                                     ; 117.15 MHz ( period = 8.536 ns )                    ; uberTopCoil:inst4|YStepCtr[1]                                                                ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.342 ns                ;
; N/A                                     ; 117.16 MHz ( period = 8.535 ns )                    ; uberTopCoil:inst4|YClkCtr[1]                                                                 ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.344 ns                ;
; N/A                                     ; 117.18 MHz ( period = 8.534 ns )                    ; uberTopCoil:inst4|YStepCtr[4]                                                                ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.340 ns                ;
; N/A                                     ; 117.19 MHz ( period = 8.533 ns )                    ; uberTopCoil:inst4|YClkCtr[0]                                                                 ; uberTopCoil:inst4|YGain[9]  ; Clock      ; Clock    ; None                        ; None                      ; 8.327 ns                ;
; N/A                                     ; 117.21 MHz ( period = 8.532 ns )                    ; uberTopCoil:inst4|YClkCtr[7]                                                                 ; uberTopCoil:inst4|Gain[9]   ; Clock      ; Clock    ; None                        ; None                      ; 8.319 ns                ;
; N/A                                     ; 117.23 MHz ( period = 8.530 ns )                    ; Ram1Port:RecordHolder|altsyncram:altsyncram_component|altsyncram_r6a1:auto_generated|q_a[32] ; uberTopCoil:inst4|XRecDone  ; Clock      ; Clock    ; None                        ; None                      ; 8.329 ns                ;
; N/A                                     ; 117.23 MHz ( period = 8.530 ns )                    ; uberTopCoil:inst4|XClkCtr[2]                                                                 ; uberTopCoil:inst4|XRecDone  ; Clock      ; Clock    ; None                        ; None                      ; 8.363 ns                ;
; N/A                                     ; 117.25 MHz ( period = 8.529 ns )                    ; uberTopCoil:inst4|XStepCtr[2]                                                                ; uberTopCoil:inst4|Gain[6]   ; Clock      ; Clock    ; None                        ; None                      ; 8.269 ns                ;
; N/A                                     ; 117.25 MHz ( period = 8.529 ns )                    ; uberTopCoil:inst4|YStepCtr[11]                                                               ; uberTopCoil:inst4|Gain[5]   ; Clock      ; Clock    ; None                        ; None                      ; 8.293 ns                ;
; N/A                                     ; 117.26 MHz ( period = 8.528 ns )                    ; uberTopCoil:inst4|YClkCtr[7]                                                                 ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.330 ns                ;
; N/A                                     ; 117.27 MHz ( period = 8.527 ns )                    ; uberTopCoil:inst4|YStepCtr[10]                                                               ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.321 ns                ;
; N/A                                     ; 117.32 MHz ( period = 8.524 ns )                    ; uberTopCoil:inst4|XClkCtr[0]                                                                 ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.359 ns                ;
; N/A                                     ; 117.32 MHz ( period = 8.524 ns )                    ; uberTopCoil:inst4|YRecDone                                                                   ; uberTopCoil:inst4|Gain[6]   ; Clock      ; Clock    ; None                        ; None                      ; 8.299 ns                ;
; N/A                                     ; 117.33 MHz ( period = 8.523 ns )                    ; uberTopCoil:inst4|YStepCtr[0]                                                                ; uberTopCoil:inst4|Gain[7]   ; Clock      ; Clock    ; None                        ; None                      ; 8.336 ns                ;
; N/A                                     ; 117.38 MHz ( period = 8.519 ns )                    ; uberTopCoil:inst4|XStepCtr[4]                                                                ; uberTopCoil:inst4|Gain[9]   ; Clock      ; Clock    ; None                        ; None                      ; 8.324 ns                ;
; N/A                                     ; 117.38 MHz ( period = 8.519 ns )                    ; uberTopCoil:inst4|YClkCtr[1]                                                                 ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.313 ns                ;
; N/A                                     ; 117.43 MHz ( period = 8.516 ns )                    ; uberTopCoil:inst4|XStepCtr[0]                                                                ; uberTopCoil:inst4|Gain[9]   ; Clock      ; Clock    ; None                        ; None                      ; 8.286 ns                ;
; N/A                                     ; 117.44 MHz ( period = 8.515 ns )                    ; uberTopCoil:inst4|XClkCtr[4]                                                                 ; uberTopCoil:inst4|XGain[8]  ; Clock      ; Clock    ; None                        ; None                      ; 8.345 ns                ;
; N/A                                     ; 117.45 MHz ( period = 8.514 ns )                    ; uberTopCoil:inst4|XStepCtr[1]                                                                ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.284 ns                ;
; N/A                                     ; 117.48 MHz ( period = 8.512 ns )                    ; uberTopCoil:inst4|YClkCtr[7]                                                                 ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.299 ns                ;
; N/A                                     ; 117.52 MHz ( period = 8.509 ns )                    ; uberTopCoil:inst4|YClkCtr[0]                                                                 ; uberTopCoil:inst4|Gain[5]   ; Clock      ; Clock    ; None                        ; None                      ; 8.273 ns                ;
; N/A                                     ; 117.56 MHz ( period = 8.506 ns )                    ; uberTopCoil:inst4|YRecDone                                                                   ; uberTopCoil:inst4|Gain[4]   ; Clock      ; Clock    ; None                        ; None                      ; 8.318 ns                ;
; N/A                                     ; 117.70 MHz ( period = 8.496 ns )                    ; uberTopCoil:inst4|YStepCtr[1]                                                                ; uberTopCoil:inst4|Gain[7]   ; Clock      ; Clock    ; None                        ; None                      ; 8.310 ns                ;
; N/A                                     ; 117.73 MHz ( period = 8.494 ns )                    ; uberTopCoil:inst4|XStepCtr[2]                                                                ; uberTopCoil:inst4|Gain[11]  ; Clock      ; Clock    ; None                        ; None                      ; 8.232 ns                ;
; N/A                                     ; 117.73 MHz ( period = 8.494 ns )                    ; uberTopCoil:inst4|YClkCtr[10]                                                                ; uberTopCoil:inst4|Gain[9]   ; Clock      ; Clock    ; None                        ; None                      ; 8.281 ns                ;
; N/A                                     ; 117.73 MHz ( period = 8.494 ns )                    ; uberTopCoil:inst4|YStepCtr[4]                                                                ; uberTopCoil:inst4|Gain[7]   ; Clock      ; Clock    ; None                        ; None                      ; 8.308 ns                ;
; N/A                                     ; 117.76 MHz ( period = 8.492 ns )                    ; uberTopCoil:inst4|YClkCtr[6]                                                                 ; uberTopCoil:inst4|Gain[11]  ; Clock      ; Clock    ; None                        ; None                      ; 8.248 ns                ;
; N/A                                     ; 117.79 MHz ( period = 8.490 ns )                    ; uberTopCoil:inst4|YClkCtr[10]                                                                ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.292 ns                ;
; N/A                                     ; 117.79 MHz ( period = 8.490 ns )                    ; uberTopCoil:inst4|XStepCtr[2]                                                                ; uberTopCoil:inst4|Gain[7]   ; Clock      ; Clock    ; None                        ; None                      ; 8.268 ns                ;
; N/A                                     ; 117.83 MHz ( period = 8.487 ns )                    ; uberTopCoil:inst4|XClkCtr[8]                                                                 ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.337 ns                ;
; N/A                                     ; 117.83 MHz ( period = 8.487 ns )                    ; uberTopCoil:inst4|YStepCtr[10]                                                               ; uberTopCoil:inst4|Gain[7]   ; Clock      ; Clock    ; None                        ; None                      ; 8.289 ns                ;
; N/A                                     ; 117.84 MHz ( period = 8.486 ns )                    ; uberTopCoil:inst4|YStepCtr[5]                                                                ; uberTopCoil:inst4|Gain[3]   ; Clock      ; Clock    ; None                        ; None                      ; 8.299 ns                ;
; N/A                                     ; 117.87 MHz ( period = 8.484 ns )                    ; uberTopCoil:inst4|XStepCtr[2]                                                                ; uberTopCoil:inst4|XGain[11] ; Clock      ; Clock    ; None                        ; None                      ; 8.234 ns                ;
; N/A                                     ; 117.90 MHz ( period = 8.482 ns )                    ; uberTopCoil:inst4|YClkCtr[6]                                                                 ; uberTopCoil:inst4|YRecDone  ; Clock      ; Clock    ; None                        ; None                      ; 8.251 ns                ;
; N/A                                     ; 117.91 MHz ( period = 8.481 ns )                    ; uberTopCoil:inst4|YClkCtr[9]                                                                 ; uberTopCoil:inst4|Gain[11]  ; Clock      ; Clock    ; None                        ; None                      ; 8.236 ns                ;
; N/A                                     ; 117.91 MHz ( period = 8.481 ns )                    ; uberTopCoil:inst4|YRecDone                                                                   ; uberTopCoil:inst4|YGain[11] ; Clock      ; Clock    ; None                        ; None                      ; 8.267 ns                ;
; N/A                                     ; 117.94 MHz ( period = 8.479 ns )                    ; uberTopCoil:inst4|YClkCtr[1]                                                                 ; uberTopCoil:inst4|Gain[7]   ; Clock      ; Clock    ; None                        ; None                      ; 8.281 ns                ;
; N/A                                     ; 117.97 MHz ( period = 8.477 ns )                    ; uberTopCoil:inst4|YStepCtr[5]                                                                ; uberTopCoil:inst4|YGain[9]  ; Clock      ; Clock    ; None                        ; None                      ; 8.283 ns                ;
; N/A                                     ; 118.01 MHz ( period = 8.474 ns )                    ; uberTopCoil:inst4|YClkCtr[10]                                                                ; uberTopCoil:inst4|Gain[8]   ; Clock      ; Clock    ; None                        ; None                      ; 8.261 ns                ;
; N/A                                     ; 118.04 MHz ( period = 8.472 ns )                    ; Ram1Port:RecordHolder|altsyncram:altsyncram_component|altsyncram_r6a1:auto_generated|q_a[33] ; uberTopCoil:inst4|XRecDone  ; Clock      ; Clock    ; None                        ; None                      ; 8.271 ns                ;
; N/A                                     ; 118.04 MHz ( period = 8.472 ns )                    ; uberTopCoil:inst4|XClkCtr[9]                                                                 ; uberTopCoil:inst4|Gain[9]   ; Clock      ; Clock    ; None                        ; None                      ; 8.307 ns                ;
; N/A                                     ; 118.04 MHz ( period = 8.472 ns )                    ; uberTopCoil:inst4|YClkCtr[7]                                                                 ; uberTopCoil:inst4|Gain[7]   ; Clock      ; Clock    ; None                        ; None                      ; 8.267 ns                ;
; N/A                                     ; 118.04 MHz ( period = 8.472 ns )                    ; uberTopCoil:inst4|YStepCtr[11]                                                               ; uberTopCoil:inst4|Gain[6]   ; Clock      ; Clock    ; None                        ; None                      ; 8.236 ns                ;
; N/A                                     ; 118.06 MHz ( period = 8.470 ns )                    ; uberTopCoil:inst4|XStepCtr[9]                                                                ; uberTopCoil:inst4|Gain[10]  ; Clock      ; Clock    ; None                        ; None                      ; 8.302 ns                ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ;                                                                                              ;                             ;            ;          ;                             ;                           ;                         ;
+-----------------------------------------+-----------------------------------------------------+----------------------------------------------------------------------------------------------+-----------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------+
; tsu                                                                                                                                                           ;
+-------+--------------+------------+------------+---------------------------------------------------------------------------------------------------+----------+
; Slack ; Required tsu ; Actual tsu ; From       ; To                                                                                                ; To Clock ;
+-------+--------------+------------+------------+---------------------------------------------------------------------------------------------------+----------+
; N/A   ; None         ; 4.291 ns   ; Trigger    ; uberTopCoil:inst4|RamAdd[0]                                                                       ; Clock    ;
; N/A   ; None         ; 4.291 ns   ; Trigger    ; uberTopCoil:inst4|RamAdd[1]                                                                       ; Clock    ;
; N/A   ; None         ; 4.291 ns   ; Trigger    ; uberTopCoil:inst4|RamAdd[2]                                                                       ; Clock    ;
; N/A   ; None         ; 4.291 ns   ; Trigger    ; uberTopCoil:inst4|RamAdd[3]                                                                       ; Clock    ;
; N/A   ; None         ; 4.291 ns   ; Trigger    ; uberTopCoil:inst4|RamAdd[4]                                                                       ; Clock    ;
; N/A   ; None         ; 4.291 ns   ; Trigger    ; uberTopCoil:inst4|RamAdd[5]                                                                       ; Clock    ;
; N/A   ; None         ; 4.291 ns   ; Trigger    ; uberTopCoil:inst4|RamAdd[6]                                                                       ; Clock    ;
; N/A   ; None         ; 4.291 ns   ; Trigger    ; uberTopCoil:inst4|RamAdd[7]                                                                       ; Clock    ;
; N/A   ; None         ; 4.244 ns   ; Usb[10]    ; uberTopCoil:inst4|RamAdd[0]                                                                       ; Clock    ;
; N/A   ; None         ; 4.244 ns   ; Usb[10]    ; uberTopCoil:inst4|RamAdd[1]                                                                       ; Clock    ;
; N/A   ; None         ; 4.244 ns   ; Usb[10]    ; uberTopCoil:inst4|RamAdd[2]                                                                       ; Clock    ;
; N/A   ; None         ; 4.244 ns   ; Usb[10]    ; uberTopCoil:inst4|RamAdd[3]                                                                       ; Clock    ;
; N/A   ; None         ; 4.244 ns   ; Usb[10]    ; uberTopCoil:inst4|RamAdd[4]                                                                       ; Clock    ;
; N/A   ; None         ; 4.244 ns   ; Usb[10]    ; uberTopCoil:inst4|RamAdd[5]                                                                       ; Clock    ;
; N/A   ; None         ; 4.244 ns   ; Usb[10]    ; uberTopCoil:inst4|RamAdd[6]                                                                       ; Clock    ;
; N/A   ; None         ; 4.244 ns   ; Usb[10]    ; uberTopCoil:inst4|RamAdd[7]                                                                       ; Clock    ;
; N/A   ; None         ; 3.998 ns   ; Trigger    ; uberTopCoil:inst4|RamAdd[8]                                                                       ; Clock    ;
; N/A   ; None         ; 3.998 ns   ; Trigger    ; uberTopCoil:inst4|RamAdd[9]                                                                       ; Clock    ;
; N/A   ; None         ; 3.951 ns   ; Usb[10]    ; uberTopCoil:inst4|RamAdd[8]                                                                       ; Clock    ;
; N/A   ; None         ; 3.951 ns   ; Usb[10]    ; uberTopCoil:inst4|RamAdd[9]                                                                       ; Clock    ;
; N/A   ; None         ; 3.816 ns   ; Disable-In ; uberTopCoil:inst4|State.100                                                                       ; Clock    ;
; N/A   ; None         ; 3.816 ns   ; Disable-In ; uberTopCoil:inst4|State.000                                                                       ; Clock    ;
; N/A   ; None         ; 3.713 ns   ; Disable-In ; uberTopCoil:inst4|State.001                                                                       ; Clock    ;
; N/A   ; None         ; 3.566 ns   ; Usb[8]     ; uberTopCoil:inst4|RamAdd[0]                                                                       ; Clock    ;
; N/A   ; None         ; 3.566 ns   ; Usb[8]     ; uberTopCoil:inst4|RamAdd[1]                                                                       ; Clock    ;
; N/A   ; None         ; 3.566 ns   ; Usb[8]     ; uberTopCoil:inst4|RamAdd[2]                                                                       ; Clock    ;
; N/A   ; None         ; 3.566 ns   ; Usb[8]     ; uberTopCoil:inst4|RamAdd[3]                                                                       ; Clock    ;
; N/A   ; None         ; 3.566 ns   ; Usb[8]     ; uberTopCoil:inst4|RamAdd[4]                                                                       ; Clock    ;
; N/A   ; None         ; 3.566 ns   ; Usb[8]     ; uberTopCoil:inst4|RamAdd[5]                                                                       ; Clock    ;
; N/A   ; None         ; 3.566 ns   ; Usb[8]     ; uberTopCoil:inst4|RamAdd[6]                                                                       ; Clock    ;
; N/A   ; None         ; 3.566 ns   ; Usb[8]     ; uberTopCoil:inst4|RamAdd[7]                                                                       ; Clock    ;
; N/A   ; None         ; 3.405 ns   ; Trigger    ; uberTopCoil:inst4|State.100                                                                       ; Clock    ;
; N/A   ; None         ; 3.405 ns   ; Trigger    ; uberTopCoil:inst4|State.000                                                                       ; Clock    ;
; N/A   ; None         ; 3.302 ns   ; Trigger    ; uberTopCoil:inst4|State.001                                                                       ; Clock    ;
; N/A   ; None         ; 3.273 ns   ; Usb[8]     ; uberTopCoil:inst4|RamAdd[8]                                                                       ; Clock    ;
; N/A   ; None         ; 3.273 ns   ; Usb[8]     ; uberTopCoil:inst4|RamAdd[9]                                                                       ; Clock    ;
; N/A   ; None         ; 3.011 ns   ; Usb[10]    ; uberTopCoil:inst4|State.100                                                                       ; Clock    ;
; N/A   ; None         ; 3.011 ns   ; Usb[10]    ; uberTopCoil:inst4|State.000                                                                       ; Clock    ;
; N/A   ; None         ; 2.989 ns   ; Usb[9]     ; uberTopCoil:inst4|RamAdd[0]                                                                       ; Clock    ;
; N/A   ; None         ; 2.989 ns   ; Usb[9]     ; uberTopCoil:inst4|RamAdd[1]                                                                       ; Clock    ;
; N/A   ; None         ; 2.989 ns   ; Usb[9]     ; uberTopCoil:inst4|RamAdd[2]                                                                       ; Clock    ;
; N/A   ; None         ; 2.989 ns   ; Usb[9]     ; uberTopCoil:inst4|RamAdd[3]                                                                       ; Clock    ;
; N/A   ; None         ; 2.989 ns   ; Usb[9]     ; uberTopCoil:inst4|RamAdd[4]                                                                       ; Clock    ;
; N/A   ; None         ; 2.989 ns   ; Usb[9]     ; uberTopCoil:inst4|RamAdd[5]                                                                       ; Clock    ;
; N/A   ; None         ; 2.989 ns   ; Usb[9]     ; uberTopCoil:inst4|RamAdd[6]                                                                       ; Clock    ;
; N/A   ; None         ; 2.989 ns   ; Usb[9]     ; uberTopCoil:inst4|RamAdd[7]                                                                       ; Clock    ;
; N/A   ; None         ; 2.908 ns   ; Usb[10]    ; uberTopCoil:inst4|State.001                                                                       ; Clock    ;
; N/A   ; None         ; 2.696 ns   ; Usb[9]     ; uberTopCoil:inst4|RamAdd[8]                                                                       ; Clock    ;
; N/A   ; None         ; 2.696 ns   ; Usb[9]     ; uberTopCoil:inst4|RamAdd[9]                                                                       ; Clock    ;
; N/A   ; None         ; 2.459 ns   ; Usb[9]     ; uberTopCoil:inst4|State.000                                                                       ; Clock    ;
; N/A   ; None         ; 2.336 ns   ; Usb[8]     ; uberTopCoil:inst4|State.100                                                                       ; Clock    ;
; N/A   ; None         ; 2.336 ns   ; Usb[8]     ; uberTopCoil:inst4|State.000                                                                       ; Clock    ;
; N/A   ; None         ; 2.250 ns   ; Usb[9]     ; uberTopCoil:inst4|State.100                                                                       ; Clock    ;
; N/A   ; None         ; 2.233 ns   ; Usb[8]     ; uberTopCoil:inst4|State.001                                                                       ; Clock    ;
; N/A   ; None         ; 2.156 ns   ; Usb[10]    ; uberTopCoil:inst4|RecNum[9]                                                                       ; Clock    ;
; N/A   ; None         ; 2.156 ns   ; Usb[10]    ; uberTopCoil:inst4|RecNum[8]                                                                       ; Clock    ;
; N/A   ; None         ; 2.156 ns   ; Usb[10]    ; uberTopCoil:inst4|RecNum[0]                                                                       ; Clock    ;
; N/A   ; None         ; 2.156 ns   ; Usb[10]    ; uberTopCoil:inst4|RecNum[1]                                                                       ; Clock    ;
; N/A   ; None         ; 2.156 ns   ; Usb[10]    ; uberTopCoil:inst4|RecNum[2]                                                                       ; Clock    ;
; N/A   ; None         ; 2.156 ns   ; Usb[10]    ; uberTopCoil:inst4|RecNum[3]                                                                       ; Clock    ;
; N/A   ; None         ; 2.156 ns   ; Usb[10]    ; uberTopCoil:inst4|RecNum[4]                                                                       ; Clock    ;
; N/A   ; None         ; 2.156 ns   ; Usb[10]    ; uberTopCoil:inst4|RecNum[5]                                                                       ; Clock    ;
; N/A   ; None         ; 2.156 ns   ; Usb[10]    ; uberTopCoil:inst4|RecNum[6]                                                                       ; Clock    ;
; N/A   ; None         ; 2.156 ns   ; Usb[10]    ; uberTopCoil:inst4|RecNum[7]                                                                       ; Clock    ;
; N/A   ; None         ; 2.076 ns   ; Usb[10]    ; uberTopCoil:inst4|RecExec[5]                                                                      ; Clock    ;
; N/A   ; None         ; 2.076 ns   ; Usb[10]    ; uberTopCoil:inst4|RecExec[7]                                                                      ; Clock    ;
; N/A   ; None         ; 1.790 ns   ; Usb[10]    ; uberTopCoil:inst4|RamWren                                                                         ; Clock    ;
; N/A   ; None         ; 1.662 ns   ; Usb[9]     ; uberTopCoil:inst4|State.001                                                                       ; Clock    ;
; N/A   ; None         ; 1.537 ns   ; Disable-In ; uberTopCoil:inst4|State.010                                                                       ; Clock    ;
; N/A   ; None         ; 1.511 ns   ; Usb[10]    ; uberTopCoil:inst4|RecExec[0]                                                                      ; Clock    ;
; N/A   ; None         ; 1.511 ns   ; Usb[10]    ; uberTopCoil:inst4|RecExec[1]                                                                      ; Clock    ;
; N/A   ; None         ; 1.511 ns   ; Usb[10]    ; uberTopCoil:inst4|RecExec[2]                                                                      ; Clock    ;
; N/A   ; None         ; 1.511 ns   ; Usb[10]    ; uberTopCoil:inst4|RecExec[3]                                                                      ; Clock    ;
; N/A   ; None         ; 1.511 ns   ; Usb[10]    ; uberTopCoil:inst4|RecExec[4]                                                                      ; Clock    ;
; N/A   ; None         ; 1.511 ns   ; Usb[10]    ; uberTopCoil:inst4|RecExec[6]                                                                      ; Clock    ;
; N/A   ; None         ; 1.478 ns   ; Usb[10]    ; uberTopCoil:inst4|RecExec[9]                                                                      ; Clock    ;
; N/A   ; None         ; 1.478 ns   ; Usb[10]    ; uberTopCoil:inst4|RecExec[8]                                                                      ; Clock    ;
; N/A   ; None         ; 1.242 ns   ; Usb[3]     ; uberTopCoil:inst4|RecBuf[59]                                                                      ; Clock    ;
; N/A   ; None         ; 1.191 ns   ; Usb[9]     ; uberTopCoil:inst4|HardReset                                                                       ; Clock    ;
; N/A   ; None         ; 1.156 ns   ; DigIn0     ; lpm_counter0:PhaseAccumulator|lpm_counter:lpm_counter_component|cntr_8jj:auto_generated|safe_q[0] ; Clock    ;
; N/A   ; None         ; 1.156 ns   ; DigIn0     ; lpm_counter0:PhaseAccumulator|lpm_counter:lpm_counter_component|cntr_8jj:auto_generated|safe_q[1] ; Clock    ;
; N/A   ; None         ; 1.156 ns   ; DigIn0     ; lpm_counter0:PhaseAccumulator|lpm_counter:lpm_counter_component|cntr_8jj:auto_generated|safe_q[2] ; Clock    ;
; N/A   ; None         ; 1.156 ns   ; DigIn0     ; lpm_counter0:PhaseAccumulator|lpm_counter:lpm_counter_component|cntr_8jj:auto_generated|safe_q[3] ; Clock    ;
; N/A   ; None         ; 1.156 ns   ; DigIn0     ; lpm_counter0:PhaseAccumulator|lpm_counter:lpm_counter_component|cntr_8jj:auto_generated|safe_q[4] ; Clock    ;
; N/A   ; None         ; 1.156 ns   ; DigIn0     ; lpm_counter0:PhaseAccumulator|lpm_counter:lpm_counter_component|cntr_8jj:auto_generated|safe_q[5] ; Clock    ;
; N/A   ; None         ; 1.156 ns   ; DigIn0     ; lpm_counter0:PhaseAccumulator|lpm_counter:lpm_counter_component|cntr_8jj:auto_generated|safe_q[6] ; Clock    ;
; N/A   ; None         ; 1.156 ns   ; DigIn0     ; lpm_counter0:PhaseAccumulator|lpm_counter:lpm_counter_component|cntr_8jj:auto_generated|safe_q[7] ; Clock    ;
; N/A   ; None         ; 1.156 ns   ; DigIn0     ; lpm_counter0:PhaseAccumulator|lpm_counter:lpm_counter_component|cntr_8jj:auto_generated|safe_q[8] ; Clock    ;
; N/A   ; None         ; 1.156 ns   ; DigIn0     ; lpm_counter0:PhaseAccumulator|lpm_counter:lpm_counter_component|cntr_8jj:auto_generated|safe_q[9] ; Clock    ;
; N/A   ; None         ; 1.126 ns   ; Trigger    ; uberTopCoil:inst4|State.010                                                                       ; Clock    ;
; N/A   ; None         ; 1.043 ns   ; Usb[10]    ; uberTopCoil:inst4|State.010                                                                       ; Clock    ;
; N/A   ; None         ; 1.025 ns   ; Usb[8]     ; uberTopCoil:inst4|HardReset                                                                       ; Clock    ;
; N/A   ; None         ; 0.919 ns   ; Usb[10]    ; uberTopCoil:inst4|HardReset                                                                       ; Clock    ;
; N/A   ; None         ; 0.765 ns   ; Usb[2]     ; uberTopCoil:inst4|RecBuf[82]                                                                      ; Clock    ;
; N/A   ; None         ; 0.762 ns   ; Usb[2]     ; uberTopCoil:inst4|RecBuf[66]                                                                      ; Clock    ;
; N/A   ; None         ; 0.740 ns   ; Usb[0]     ; uberTopCoil:inst4|RecBuf[16]                                                                      ; Clock    ;
; N/A   ; None         ; 0.677 ns   ; Usb[2]     ; uberTopCoil:inst4|RecBuf[26]                                                                      ; Clock    ;
; N/A   ; None         ; 0.673 ns   ; Usb[2]     ; uberTopCoil:inst4|RecBuf[50]                                                                      ; Clock    ;
; N/A   ; None         ; 0.672 ns   ; Usb[6]     ; uberTopCoil:inst4|RecBuf[30]                                                                      ; Clock    ;
; N/A   ; None         ; 0.670 ns   ; Usb[6]     ; uberTopCoil:inst4|RecBuf[54]                                                                      ; Clock    ;
; N/A   ; None         ; 0.656 ns   ; Usb[2]     ; uberTopCoil:inst4|RecBuf[58]                                                                      ; Clock    ;
; N/A   ; None         ; 0.656 ns   ; Usb[2]     ; uberTopCoil:inst4|RecBuf[42]                                                                      ; Clock    ;
; N/A   ; None         ; 0.635 ns   ; Usb[6]     ; uberTopCoil:inst4|RecBuf[70]                                                                      ; Clock    ;
; N/A   ; None         ; 0.613 ns   ; Usb[0]     ; uberTopCoil:inst4|RecBuf[24]                                                                      ; Clock    ;
; N/A   ; None         ; 0.612 ns   ; Usb[0]     ; uberTopCoil:inst4|RecBuf[48]                                                                      ; Clock    ;
; N/A   ; None         ; 0.606 ns   ; Usb[0]     ; uberTopCoil:inst4|HardReset                                                                       ; Clock    ;
; N/A   ; None         ; 0.590 ns   ; Usb[1]     ; uberTopCoil:inst4|RecBuf[57]                                                                      ; Clock    ;
; N/A   ; None         ; 0.587 ns   ; Usb[3]     ; uberTopCoil:inst4|RecBuf[11]                                                                      ; Clock    ;
; N/A   ; None         ; 0.585 ns   ; Usb[2]     ; uberTopCoil:inst4|RecBuf[2]                                                                       ; Clock    ;
; N/A   ; None         ; 0.565 ns   ; Usb[0]     ; uberTopCoil:inst4|RecBuf[64]                                                                      ; Clock    ;
; N/A   ; None         ; 0.564 ns   ; Usb[0]     ; uberTopCoil:inst4|RecBuf[80]                                                                      ; Clock    ;
; N/A   ; None         ; 0.561 ns   ; Usb[3]     ; uberTopCoil:inst4|RecBuf[27]                                                                      ; Clock    ;
; N/A   ; None         ; 0.560 ns   ; Usb[3]     ; uberTopCoil:inst4|RecBuf[51]                                                                      ; Clock    ;
; N/A   ; None         ; 0.553 ns   ; Usb[0]     ; uberTopCoil:inst4|RecBuf[56]                                                                      ; Clock    ;
; N/A   ; None         ; 0.522 ns   ; Disable-In ; uberTopCoil:inst4|State.011                                                                       ; Clock    ;
; N/A   ; None         ; 0.514 ns   ; Usb[1]     ; uberTopCoil:inst4|RecBuf[49]                                                                      ; Clock    ;
; N/A   ; None         ; 0.514 ns   ; Usb[3]     ; uberTopCoil:inst4|RecBuf[67]                                                                      ; Clock    ;
; N/A   ; None         ; 0.511 ns   ; Usb[1]     ; uberTopCoil:inst4|RecBuf[25]                                                                      ; Clock    ;
; N/A   ; None         ; 0.500 ns   ; Usb[5]     ; uberTopCoil:inst4|RecBuf[13]                                                                      ; Clock    ;
; N/A   ; None         ; 0.495 ns   ; Usb[3]     ; uberTopCoil:inst4|RecBuf[3]                                                                       ; Clock    ;
; N/A   ; None         ; 0.495 ns   ; Usb[3]     ; uberTopCoil:inst4|RecBuf[43]                                                                      ; Clock    ;
; N/A   ; None         ; 0.475 ns   ; Usb[0]     ; uberTopCoil:inst4|RecBuf[32]                                                                      ; Clock    ;
; N/A   ; None         ; 0.474 ns   ; Usb[0]     ; uberTopCoil:inst4|RecBuf[72]                                                                      ; Clock    ;
; N/A   ; None         ; 0.453 ns   ; Usb[3]     ; uberTopCoil:inst4|RecBuf[19]                                                                      ; Clock    ;
; N/A   ; None         ; 0.441 ns   ; Usb[6]     ; uberTopCoil:inst4|RecBuf[14]                                                                      ; Clock    ;
; N/A   ; None         ; 0.440 ns   ; Usb[7]     ; uberTopCoil:inst4|RecBuf[15]                                                                      ; Clock    ;
; N/A   ; None         ; 0.432 ns   ; Usb[4]     ; uberTopCoil:inst4|RecBuf[68]                                                                      ; Clock    ;
; N/A   ; None         ; 0.408 ns   ; Usb[1]     ; uberTopCoil:inst4|RecBuf[9]                                                                       ; Clock    ;
; N/A   ; None         ; 0.401 ns   ; Usb[4]     ; uberTopCoil:inst4|RecBuf[28]                                                                      ; Clock    ;
; N/A   ; None         ; 0.399 ns   ; Usb[4]     ; uberTopCoil:inst4|RecBuf[52]                                                                      ; Clock    ;
; N/A   ; None         ; 0.370 ns   ; Usb[0]     ; uberTopCoil:inst4|RecBuf[40]                                                                      ; Clock    ;
; N/A   ; None         ; 0.368 ns   ; Usb[0]     ; uberTopCoil:inst4|RecBuf[0]                                                                       ; Clock    ;
; N/A   ; None         ; 0.366 ns   ; Usb[4]     ; uberTopCoil:inst4|RecBuf[60]                                                                      ; Clock    ;
; N/A   ; None         ; 0.366 ns   ; Usb[4]     ; uberTopCoil:inst4|RecBuf[20]                                                                      ; Clock    ;
; N/A   ; None         ; 0.348 ns   ; Usb[1]     ; uberTopCoil:inst4|RecBuf[41]                                                                      ; Clock    ;
; N/A   ; None         ; 0.346 ns   ; Usb[1]     ; uberTopCoil:inst4|RecBuf[1]                                                                       ; Clock    ;
; N/A   ; None         ; 0.343 ns   ; Usb[10]    ; uberTopCoil:inst4|Loading                                                                         ; Clock    ;
; N/A   ; None         ; 0.329 ns   ; Usb[0]     ; uberTopCoil:inst4|RecBuf[8]                                                                       ; Clock    ;
; N/A   ; None         ; 0.328 ns   ; Usb[6]     ; uberTopCoil:inst4|RecBuf[38]                                                                      ; Clock    ;
; N/A   ; None         ; 0.327 ns   ; Usb[6]     ; uberTopCoil:inst4|RecBuf[78]                                                                      ; Clock    ;
; N/A   ; None         ; 0.323 ns   ; Usb[5]     ; uberTopCoil:inst4|RecBuf[53]                                                                      ; Clock    ;
; N/A   ; None         ; 0.323 ns   ; Usb[5]     ; uberTopCoil:inst4|RecBuf[29]                                                                      ; Clock    ;
; N/A   ; None         ; 0.319 ns   ; Usb[5]     ; uberTopCoil:inst4|RecBuf[69]                                                                      ; Clock    ;
; N/A   ; None         ; 0.314 ns   ; Usb[1]     ; uberTopCoil:inst4|RecBuf[17]                                                                      ; Clock    ;
; N/A   ; None         ; 0.307 ns   ; Usb[4]     ; uberTopCoil:inst4|RecBuf[36]                                                                      ; Clock    ;
; N/A   ; None         ; 0.307 ns   ; Usb[4]     ; uberTopCoil:inst4|RecBuf[76]                                                                      ; Clock    ;
; N/A   ; None         ; 0.306 ns   ; Usb[2]     ; uberTopCoil:inst4|RecBuf[74]                                                                      ; Clock    ;
; N/A   ; None         ; 0.306 ns   ; Usb[2]     ; uberTopCoil:inst4|RecBuf[34]                                                                      ; Clock    ;
; N/A   ; None         ; 0.303 ns   ; Usb[2]     ; uberTopCoil:inst4|RecBuf[18]                                                                      ; Clock    ;
; N/A   ; None         ; 0.290 ns   ; Usb[5]     ; uberTopCoil:inst4|RecBuf[45]                                                                      ; Clock    ;
; N/A   ; None         ; 0.289 ns   ; Usb[2]     ; uberTopCoil:inst4|RecBuf[10]                                                                      ; Clock    ;
; N/A   ; None         ; 0.289 ns   ; Usb[5]     ; uberTopCoil:inst4|RecBuf[5]                                                                       ; Clock    ;
; N/A   ; None         ; 0.277 ns   ; Usb[10]    ; uberTopCoil:inst4|RecField[2]                                                                     ; Clock    ;
; N/A   ; None         ; 0.263 ns   ; Usb[5]     ; uberTopCoil:inst4|RecBuf[61]                                                                      ; Clock    ;
; N/A   ; None         ; 0.261 ns   ; Usb[5]     ; uberTopCoil:inst4|RecBuf[21]                                                                      ; Clock    ;
; N/A   ; None         ; 0.252 ns   ; Disable-In ; uberTopCoil:inst4|DisableCoils                                                                    ; Clock    ;
; N/A   ; None         ; 0.249 ns   ; Disable-In ; uberTopCoil:inst4|EnableXYdacs                                                                    ; Clock    ;
; N/A   ; None         ; 0.242 ns   ; Usb[1]     ; uberTopCoil:inst4|RecBuf[81]                                                                      ; Clock    ;
; N/A   ; None         ; 0.240 ns   ; Usb[1]     ; uberTopCoil:inst4|RecBuf[65]                                                                      ; Clock    ;
; N/A   ; None         ; 0.236 ns   ; Usb[4]     ; uberTopCoil:inst4|RecBuf[4]                                                                       ; Clock    ;
; N/A   ; None         ; 0.235 ns   ; Usb[4]     ; uberTopCoil:inst4|RecBuf[44]                                                                      ; Clock    ;
; N/A   ; None         ; 0.233 ns   ; Usb[4]     ; uberTopCoil:inst4|RecBuf[12]                                                                      ; Clock    ;
; N/A   ; None         ; 0.228 ns   ; Trigger    ; uberTopCoil:inst4|LastTrig                                                                        ; Clock    ;
; N/A   ; None         ; 0.202 ns   ; Usb[1]     ; uberTopCoil:inst4|RecBuf[73]                                                                      ; Clock    ;
; N/A   ; None         ; 0.199 ns   ; Usb[1]     ; uberTopCoil:inst4|RecBuf[33]                                                                      ; Clock    ;
; N/A   ; None         ; 0.197 ns   ; Usb[3]     ; uberTopCoil:inst4|RecBuf[35]                                                                      ; Clock    ;
; N/A   ; None         ; 0.196 ns   ; Usb[3]     ; uberTopCoil:inst4|RecBuf[75]                                                                      ; Clock    ;
; N/A   ; None         ; 0.162 ns   ; Usb[7]     ; uberTopCoil:inst4|RecBuf[55]                                                                      ; Clock    ;
; N/A   ; None         ; 0.162 ns   ; Usb[7]     ; uberTopCoil:inst4|RecBuf[31]                                                                      ; Clock    ;
; N/A   ; None         ; 0.112 ns   ; Usb[7]     ; uberTopCoil:inst4|RecBuf[71]                                                                      ; Clock    ;
; N/A   ; None         ; 0.112 ns   ; Usb[7]     ; uberTopCoil:inst4|RecBuf[7]                                                                       ; Clock    ;
; N/A   ; None         ; 0.109 ns   ; Usb[7]     ; uberTopCoil:inst4|RecBuf[47]                                                                      ; Clock    ;
; N/A   ; None         ; 0.092 ns   ; Usb[10]    ; uberTopCoil:inst4|RecField[0]                                                                     ; Clock    ;
; N/A   ; None         ; 0.092 ns   ; Usb[10]    ; uberTopCoil:inst4|RecField[3]                                                                     ; Clock    ;
; N/A   ; None         ; 0.083 ns   ; Usb[7]     ; uberTopCoil:inst4|RecBuf[23]                                                                      ; Clock    ;
; N/A   ; None         ; 0.083 ns   ; Usb[7]     ; uberTopCoil:inst4|RecBuf[63]                                                                      ; Clock    ;
; N/A   ; None         ; 0.078 ns   ; Usb[6]     ; uberTopCoil:inst4|RecBuf[46]                                                                      ; Clock    ;
; N/A   ; None         ; 0.078 ns   ; Usb[6]     ; uberTopCoil:inst4|RecBuf[6]                                                                       ; Clock    ;
; N/A   ; None         ; 0.057 ns   ; Usb[9]     ; uberTopCoil:inst4|State.010                                                                       ; Clock    ;
; N/A   ; None         ; 0.039 ns   ; Usb[6]     ; uberTopCoil:inst4|RecBuf[22]                                                                      ; Clock    ;
; N/A   ; None         ; 0.038 ns   ; Usb[6]     ; uberTopCoil:inst4|RecBuf[62]                                                                      ; Clock    ;
; N/A   ; None         ; -0.056 ns  ; Usb[5]     ; uberTopCoil:inst4|RecBuf[37]                                                                      ; Clock    ;
; N/A   ; None         ; -0.056 ns  ; Usb[5]     ; uberTopCoil:inst4|RecBuf[77]                                                                      ; Clock    ;
; N/A   ; None         ; -0.064 ns  ; Usb[8]     ; uberTopCoil:inst4|State.010                                                                       ; Clock    ;
; N/A   ; None         ; -0.191 ns  ; Usb[10]    ; uberTopCoil:inst4|State.011                                                                       ; Clock    ;
; N/A   ; None         ; -0.202 ns  ; Usb[7]     ; uberTopCoil:inst4|RecBuf[79]                                                                      ; Clock    ;
; N/A   ; None         ; -0.204 ns  ; Usb[7]     ; uberTopCoil:inst4|RecBuf[39]                                                                      ; Clock    ;
; N/A   ; None         ; -0.309 ns  ; Usb[10]    ; uberTopCoil:inst4|RecField[1]                                                                     ; Clock    ;
+-------+--------------+------------+------------+---------------------------------------------------------------------------------------------------+----------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------+
; tco                                                                                                                                                         ;
+-------+--------------+------------+---------------------------------------------------------------------------------------------+--------------+------------+
; Slack ; Required tco ; Actual tco ; From                                                                                        ; To           ; From Clock ;
+-------+--------------+------------+---------------------------------------------------------------------------------------------+--------------+------------+
; N/A   ; None         ; 13.418 ns  ; uberTopCoil:inst4|EnableXYdacs                                                              ; Phi[0]       ; Clock      ;
; N/A   ; None         ; 13.342 ns  ; uberTopCoil:inst4|EnableXYdacs                                                              ; Phi[8]       ; Clock      ;
; N/A   ; None         ; 13.314 ns  ; uberTopCoil:inst4|EnableXYdacs                                                              ; Phi[9]       ; Clock      ;
; N/A   ; None         ; 13.239 ns  ; uberTopCoil:inst4|EnableXYdacs                                                              ; Phi[7]       ; Clock      ;
; N/A   ; None         ; 13.162 ns  ; uberTopCoil:inst4|EnableXYdacs                                                              ; Phi[4]       ; Clock      ;
; N/A   ; None         ; 13.161 ns  ; uberTopCoil:inst4|EnableXYdacs                                                              ; Phi[11]      ; Clock      ;
; N/A   ; None         ; 13.160 ns  ; uberTopCoil:inst4|EnableXYdacs                                                              ; Phi[5]       ; Clock      ;
; N/A   ; None         ; 13.154 ns  ; uberTopCoil:inst4|EnableXYdacs                                                              ; Phi[6]       ; Clock      ;
; N/A   ; None         ; 13.069 ns  ; uberTopCoil:inst4|EnableXYdacs                                                              ; Phi[10]      ; Clock      ;
; N/A   ; None         ; 13.054 ns  ; lpm_rom2:10Khz-Y|altsyncram:altsyncram_component|altsyncram_kv61:auto_generated|q_a[10]     ; Phi[10]      ; Clock      ;
; N/A   ; None         ; 13.037 ns  ; uberTopCoil:inst4|EnableXYdacs                                                              ; Phi[3]       ; Clock      ;
; N/A   ; None         ; 12.944 ns  ; uberTopCoil:inst4|EnableXYdacs                                                              ; Phi[1]       ; Clock      ;
; N/A   ; None         ; 12.942 ns  ; uberTopCoil:inst4|EnableXYdacs                                                              ; Phi[2]       ; Clock      ;
; N/A   ; None         ; 12.861 ns  ; lpm_rom2:10Khz-Y|altsyncram:altsyncram_component|altsyncram_kv61:auto_generated|q_a[11]     ; Phi[11]      ; Clock      ;
; N/A   ; None         ; 12.585 ns  ; lpm_rom2:10Khz-Y|altsyncram:altsyncram_component|altsyncram_kv61:auto_generated|q_a[0]      ; Phi[0]       ; Clock      ;
; N/A   ; None         ; 12.574 ns  ; uberTopCoil:inst4|Gain[10]                                                                  ; Gain[10]     ; Clock      ;
; N/A   ; None         ; 12.557 ns  ; lpm_rom2:10kHz|altsyncram:altsyncram_component|altsyncram_kv61:auto_generated|q_a[7]        ; Phi[7]       ; Clock      ;
; N/A   ; None         ; 12.547 ns  ; lpm_rom2:10Khz-Y|altsyncram:altsyncram_component|altsyncram_kv61:auto_generated|q_a[7]      ; Phi[7]       ; Clock      ;
; N/A   ; None         ; 12.477 ns  ; lpm_rom2:10kHz|altsyncram:altsyncram_component|altsyncram_kv61:auto_generated|q_a[8]        ; Phi[8]       ; Clock      ;
; N/A   ; None         ; 12.472 ns  ; lpm_rom2:10Khz-Y|altsyncram:altsyncram_component|altsyncram_kv61:auto_generated|q_a[9]      ; Phi[9]       ; Clock      ;
; N/A   ; None         ; 12.433 ns  ; lpm_rom2:10kHz|altsyncram:altsyncram_component|altsyncram_kv61:auto_generated|q_a[10]       ; Phi[10]      ; Clock      ;
; N/A   ; None         ; 12.417 ns  ; lpm_rom2:10Khz-Y|altsyncram:altsyncram_component|altsyncram_kv61:auto_generated|q_a[2]      ; Phi[2]       ; Clock      ;
; N/A   ; None         ; 12.400 ns  ; lpm_rom2:10kHz|altsyncram:altsyncram_component|altsyncram_kv61:auto_generated|q_a[11]       ; Phi[11]      ; Clock      ;
; N/A   ; None         ; 12.392 ns  ; lpm_rom2:10Khz-Y|altsyncram:altsyncram_component|altsyncram_kv61:auto_generated|q_a[1]      ; Phi[1]       ; Clock      ;
; N/A   ; None         ; 12.356 ns  ; lpm_rom2:10Khz-Y|altsyncram:altsyncram_component|altsyncram_kv61:auto_generated|q_a[5]      ; Phi[5]       ; Clock      ;
; N/A   ; None         ; 12.342 ns  ; lpm_rom2:10Khz-Y|altsyncram:altsyncram_component|altsyncram_kv61:auto_generated|q_a[4]      ; Phi[4]       ; Clock      ;
; N/A   ; None         ; 12.334 ns  ; lpm_rom2:10Khz-Y|altsyncram:altsyncram_component|altsyncram_kv61:auto_generated|q_a[6]      ; Phi[6]       ; Clock      ;
; N/A   ; None         ; 12.321 ns  ; uberTopCoil:inst4|Gain[8]                                                                   ; Gain[8]      ; Clock      ;
; N/A   ; None         ; 12.234 ns  ; uberTopCoil:inst4|Gain[11]                                                                  ; Gain[11]     ; Clock      ;
; N/A   ; None         ; 12.222 ns  ; lpm_rom2:10Khz-Y|altsyncram:altsyncram_component|altsyncram_kv61:auto_generated|q_a[8]      ; Phi[8]       ; Clock      ;
; N/A   ; None         ; 12.146 ns  ; lpm_rom2:10kHz|altsyncram:altsyncram_component|altsyncram_kv61:auto_generated|q_a[0]        ; Phi[0]       ; Clock      ;
; N/A   ; None         ; 12.145 ns  ; lpm_rom2:10kHz|altsyncram:altsyncram_component|altsyncram_kv61:auto_generated|q_a[9]        ; Phi[9]       ; Clock      ;
; N/A   ; None         ; 12.084 ns  ; uberTopCoil:inst4|Gain[3]                                                                   ; Gain[3]      ; Clock      ;
; N/A   ; None         ; 12.056 ns  ; uberTopCoil:inst4|Gain[5]                                                                   ; Gain[5]      ; Clock      ;
; N/A   ; None         ; 12.040 ns  ; lpm_rom2:10kHz|altsyncram:altsyncram_component|altsyncram_kv61:auto_generated|q_a[3]        ; Phi[3]       ; Clock      ;
; N/A   ; None         ; 12.029 ns  ; lpm_rom2:10Khz-Y|altsyncram:altsyncram_component|altsyncram_kv61:auto_generated|q_a[3]      ; Phi[3]       ; Clock      ;
; N/A   ; None         ; 12.022 ns  ; uberTopCoil:inst4|Gain[7]                                                                   ; Gain[7]      ; Clock      ;
; N/A   ; None         ; 12.010 ns  ; lpm_rom2:10kHz|altsyncram:altsyncram_component|altsyncram_kv61:auto_generated|q_a[5]        ; Phi[5]       ; Clock      ;
; N/A   ; None         ; 12.000 ns  ; lpm_rom2:10kHz|altsyncram:altsyncram_component|altsyncram_kv61:auto_generated|q_a[6]        ; Phi[6]       ; Clock      ;
; N/A   ; None         ; 11.986 ns  ; lpm_rom2:10kHz|altsyncram:altsyncram_component|altsyncram_kv61:auto_generated|q_a[4]        ; Phi[4]       ; Clock      ;
; N/A   ; None         ; 11.964 ns  ; uberTopCoil:inst4|Gain[6]                                                                   ; Gain[6]      ; Clock      ;
; N/A   ; None         ; 11.868 ns  ; uberTopCoil:inst4|Gain[4]                                                                   ; Gain[4]      ; Clock      ;
; N/A   ; None         ; 11.855 ns  ; uberTopCoil:inst4|Gain[9]                                                                   ; Gain[9]      ; Clock      ;
; N/A   ; None         ; 11.642 ns  ; uberTopCoil:inst4|DisableCoils                                                              ; DisableCoils ; Clock      ;
; N/A   ; None         ; 11.609 ns  ; uberTopCoil:inst4|Gain[2]                                                                   ; Gain[2]      ; Clock      ;
; N/A   ; None         ; 11.519 ns  ; lpm_counter5:inst|lpm_counter:lpm_counter_component|cntr_c0j:auto_generated|safe_q[3]       ; DigOut0      ; Clock      ;
; N/A   ; None         ; 11.502 ns  ; lpm_rom2:10kHz|altsyncram:altsyncram_component|altsyncram_kv61:auto_generated|q_a[1]        ; Phi[1]       ; Clock      ;
; N/A   ; None         ; 11.487 ns  ; lpm_counter5:inst|lpm_counter:lpm_counter_component|cntr_c0j:auto_generated|safe_q[2]       ; DigOut0      ; Clock      ;
; N/A   ; None         ; 11.466 ns  ; lpm_rom2:10kHz|altsyncram:altsyncram_component|altsyncram_kv61:auto_generated|q_a[2]        ; Phi[2]       ; Clock      ;
; N/A   ; None         ; 11.319 ns  ; uberTopCoil:inst4|GainY                                                                     ; GainY        ; Clock      ;
; N/A   ; None         ; 11.319 ns  ; uberTopCoil:inst4|GainX                                                                     ; GainX        ; Clock      ;
; N/A   ; None         ; 11.316 ns  ; lpm_counter5:inst|lpm_counter:lpm_counter_component|cntr_c0j:auto_generated|safe_q[5]       ; DigOut0      ; Clock      ;
; N/A   ; None         ; 11.299 ns  ; uberTopCoil:inst4|Gain[1]                                                                   ; Gain[1]      ; Clock      ;
; N/A   ; None         ; 11.212 ns  ; lpm_counter5:inst|lpm_counter:lpm_counter_component|cntr_c0j:auto_generated|safe_q[4]       ; DigOut0      ; Clock      ;
; N/A   ; None         ; 10.840 ns  ; uberTopCoil:inst4|Gain[0]                                                                   ; Gain[0]      ; Clock      ;
; N/A   ; None         ; 10.271 ns  ; lpm_counter3:inst2|lpm_counter:lpm_counter_component|cntr_m4j:auto_generated|safe_q[10]     ; DigOut1      ; Clock      ;
; N/A   ; None         ; 9.374 ns   ; lpm_counter2:FreqSetter|lpm_counter:lpm_counter_component|cntr_nkh:auto_generated|safe_q[1] ; Phi[7]       ; Clock      ;
; N/A   ; None         ; 9.233 ns   ; lpm_counter2:FreqSetter|lpm_counter:lpm_counter_component|cntr_nkh:auto_generated|safe_q[1] ; Phi[8]       ; Clock      ;
; N/A   ; None         ; 9.218 ns   ; lpm_counter2:FreqSetter|lpm_counter:lpm_counter_component|cntr_nkh:auto_generated|safe_q[2] ; Phi[7]       ; Clock      ;
; N/A   ; None         ; 9.196 ns   ; lpm_counter2:FreqSetter|lpm_counter:lpm_counter_component|cntr_nkh:auto_generated|safe_q[1] ; Phi[3]       ; Clock      ;
; N/A   ; None         ; 9.195 ns   ; lpm_counter2:FreqSetter|lpm_counter:lpm_counter_component|cntr_nkh:auto_generated|safe_q[1] ; Phi[9]       ; Clock      ;
; N/A   ; None         ; 9.103 ns   ; lpm_counter2:FreqSetter|lpm_counter:lpm_counter_component|cntr_nkh:auto_generated|safe_q[1] ; Phi[0]       ; Clock      ;
; N/A   ; None         ; 9.083 ns   ; lpm_counter2:FreqSetter|lpm_counter:lpm_counter_component|cntr_nkh:auto_generated|safe_q[1] ; Phi[10]      ; Clock      ;
; N/A   ; None         ; 9.077 ns   ; lpm_counter2:FreqSetter|lpm_counter:lpm_counter_component|cntr_nkh:auto_generated|safe_q[2] ; Phi[8]       ; Clock      ;
; N/A   ; None         ; 9.064 ns   ; lpm_counter2:FreqSetter|lpm_counter:lpm_counter_component|cntr_nkh:auto_generated|safe_q[1] ; Phi[11]      ; Clock      ;
; N/A   ; None         ; 9.043 ns   ; lpm_counter2:FreqSetter|lpm_counter:lpm_counter_component|cntr_nkh:auto_generated|safe_q[1] ; Phi[6]       ; Clock      ;
; N/A   ; None         ; 9.042 ns   ; lpm_counter2:FreqSetter|lpm_counter:lpm_counter_component|cntr_nkh:auto_generated|safe_q[1] ; Phi[4]       ; Clock      ;
; N/A   ; None         ; 9.042 ns   ; lpm_counter2:FreqSetter|lpm_counter:lpm_counter_component|cntr_nkh:auto_generated|safe_q[1] ; Phi[5]       ; Clock      ;
; N/A   ; None         ; 9.040 ns   ; lpm_counter2:FreqSetter|lpm_counter:lpm_counter_component|cntr_nkh:auto_generated|safe_q[2] ; Phi[3]       ; Clock      ;
; N/A   ; None         ; 9.039 ns   ; lpm_counter2:FreqSetter|lpm_counter:lpm_counter_component|cntr_nkh:auto_generated|safe_q[2] ; Phi[9]       ; Clock      ;
; N/A   ; None         ; 8.947 ns   ; lpm_counter2:FreqSetter|lpm_counter:lpm_counter_component|cntr_nkh:auto_generated|safe_q[2] ; Phi[0]       ; Clock      ;
; N/A   ; None         ; 8.927 ns   ; lpm_counter2:FreqSetter|lpm_counter:lpm_counter_component|cntr_nkh:auto_generated|safe_q[2] ; Phi[10]      ; Clock      ;
; N/A   ; None         ; 8.908 ns   ; lpm_counter2:FreqSetter|lpm_counter:lpm_counter_component|cntr_nkh:auto_generated|safe_q[2] ; Phi[11]      ; Clock      ;
; N/A   ; None         ; 8.887 ns   ; lpm_counter2:FreqSetter|lpm_counter:lpm_counter_component|cntr_nkh:auto_generated|safe_q[2] ; Phi[6]       ; Clock      ;
; N/A   ; None         ; 8.886 ns   ; lpm_counter2:FreqSetter|lpm_counter:lpm_counter_component|cntr_nkh:auto_generated|safe_q[2] ; Phi[4]       ; Clock      ;
; N/A   ; None         ; 8.886 ns   ; lpm_counter2:FreqSetter|lpm_counter:lpm_counter_component|cntr_nkh:auto_generated|safe_q[2] ; Phi[5]       ; Clock      ;
; N/A   ; None         ; 8.826 ns   ; lpm_counter2:FreqSetter|lpm_counter:lpm_counter_component|cntr_nkh:auto_generated|safe_q[1] ; Phi[1]       ; Clock      ;
; N/A   ; None         ; 8.824 ns   ; lpm_counter2:FreqSetter|lpm_counter:lpm_counter_component|cntr_nkh:auto_generated|safe_q[1] ; Phi[2]       ; Clock      ;
; N/A   ; None         ; 8.670 ns   ; lpm_counter2:FreqSetter|lpm_counter:lpm_counter_component|cntr_nkh:auto_generated|safe_q[2] ; Phi[1]       ; Clock      ;
; N/A   ; None         ; 8.668 ns   ; lpm_counter2:FreqSetter|lpm_counter:lpm_counter_component|cntr_nkh:auto_generated|safe_q[2] ; Phi[2]       ; Clock      ;
; N/A   ; None         ; 7.697 ns   ; lpm_counter2:FreqSetter|lpm_counter:lpm_counter_component|cntr_nkh:auto_generated|safe_q[2] ; PhiY         ; Clock      ;
; N/A   ; None         ; 7.413 ns   ; lpm_counter2:FreqSetter|lpm_counter:lpm_counter_component|cntr_nkh:auto_generated|safe_q[2] ; PhiX         ; Clock      ;
+-------+--------------+------------+---------------------------------------------------------------------------------------------+--------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; th                                                                                                                                                                  ;
+---------------+-------------+-----------+------------+---------------------------------------------------------------------------------------------------+----------+
; Minimum Slack ; Required th ; Actual th ; From       ; To                                                                                                ; To Clock ;
+---------------+-------------+-----------+------------+---------------------------------------------------------------------------------------------------+----------+
; N/A           ; None        ; 0.539 ns  ; Usb[10]    ; uberTopCoil:inst4|RecField[1]                                                                     ; Clock    ;
; N/A           ; None        ; 0.434 ns  ; Usb[7]     ; uberTopCoil:inst4|RecBuf[39]                                                                      ; Clock    ;
; N/A           ; None        ; 0.432 ns  ; Usb[7]     ; uberTopCoil:inst4|RecBuf[79]                                                                      ; Clock    ;
; N/A           ; None        ; 0.421 ns  ; Usb[10]    ; uberTopCoil:inst4|State.011                                                                       ; Clock    ;
; N/A           ; None        ; 0.294 ns  ; Usb[8]     ; uberTopCoil:inst4|State.010                                                                       ; Clock    ;
; N/A           ; None        ; 0.286 ns  ; Usb[5]     ; uberTopCoil:inst4|RecBuf[37]                                                                      ; Clock    ;
; N/A           ; None        ; 0.286 ns  ; Usb[5]     ; uberTopCoil:inst4|RecBuf[77]                                                                      ; Clock    ;
; N/A           ; None        ; 0.192 ns  ; Usb[6]     ; uberTopCoil:inst4|RecBuf[62]                                                                      ; Clock    ;
; N/A           ; None        ; 0.191 ns  ; Usb[6]     ; uberTopCoil:inst4|RecBuf[22]                                                                      ; Clock    ;
; N/A           ; None        ; 0.173 ns  ; Usb[9]     ; uberTopCoil:inst4|State.010                                                                       ; Clock    ;
; N/A           ; None        ; 0.152 ns  ; Usb[6]     ; uberTopCoil:inst4|RecBuf[46]                                                                      ; Clock    ;
; N/A           ; None        ; 0.152 ns  ; Usb[6]     ; uberTopCoil:inst4|RecBuf[6]                                                                       ; Clock    ;
; N/A           ; None        ; 0.147 ns  ; Usb[7]     ; uberTopCoil:inst4|RecBuf[23]                                                                      ; Clock    ;
; N/A           ; None        ; 0.147 ns  ; Usb[7]     ; uberTopCoil:inst4|RecBuf[63]                                                                      ; Clock    ;
; N/A           ; None        ; 0.138 ns  ; Usb[10]    ; uberTopCoil:inst4|RecField[0]                                                                     ; Clock    ;
; N/A           ; None        ; 0.138 ns  ; Usb[10]    ; uberTopCoil:inst4|RecField[3]                                                                     ; Clock    ;
; N/A           ; None        ; 0.121 ns  ; Usb[7]     ; uberTopCoil:inst4|RecBuf[47]                                                                      ; Clock    ;
; N/A           ; None        ; 0.118 ns  ; Usb[7]     ; uberTopCoil:inst4|RecBuf[71]                                                                      ; Clock    ;
; N/A           ; None        ; 0.118 ns  ; Usb[7]     ; uberTopCoil:inst4|RecBuf[7]                                                                       ; Clock    ;
; N/A           ; None        ; 0.068 ns  ; Usb[7]     ; uberTopCoil:inst4|RecBuf[55]                                                                      ; Clock    ;
; N/A           ; None        ; 0.068 ns  ; Usb[7]     ; uberTopCoil:inst4|RecBuf[31]                                                                      ; Clock    ;
; N/A           ; None        ; 0.034 ns  ; Usb[3]     ; uberTopCoil:inst4|RecBuf[75]                                                                      ; Clock    ;
; N/A           ; None        ; 0.033 ns  ; Usb[3]     ; uberTopCoil:inst4|RecBuf[35]                                                                      ; Clock    ;
; N/A           ; None        ; 0.031 ns  ; Usb[1]     ; uberTopCoil:inst4|RecBuf[33]                                                                      ; Clock    ;
; N/A           ; None        ; 0.028 ns  ; Usb[1]     ; uberTopCoil:inst4|RecBuf[73]                                                                      ; Clock    ;
; N/A           ; None        ; 0.002 ns  ; Trigger    ; uberTopCoil:inst4|LastTrig                                                                        ; Clock    ;
; N/A           ; None        ; -0.003 ns ; Usb[4]     ; uberTopCoil:inst4|RecBuf[12]                                                                      ; Clock    ;
; N/A           ; None        ; -0.005 ns ; Usb[4]     ; uberTopCoil:inst4|RecBuf[44]                                                                      ; Clock    ;
; N/A           ; None        ; -0.006 ns ; Usb[4]     ; uberTopCoil:inst4|RecBuf[4]                                                                       ; Clock    ;
; N/A           ; None        ; -0.010 ns ; Usb[1]     ; uberTopCoil:inst4|RecBuf[65]                                                                      ; Clock    ;
; N/A           ; None        ; -0.012 ns ; Usb[1]     ; uberTopCoil:inst4|RecBuf[81]                                                                      ; Clock    ;
; N/A           ; None        ; -0.019 ns ; Disable-In ; uberTopCoil:inst4|EnableXYdacs                                                                    ; Clock    ;
; N/A           ; None        ; -0.022 ns ; Disable-In ; uberTopCoil:inst4|DisableCoils                                                                    ; Clock    ;
; N/A           ; None        ; -0.031 ns ; Usb[5]     ; uberTopCoil:inst4|RecBuf[21]                                                                      ; Clock    ;
; N/A           ; None        ; -0.033 ns ; Usb[5]     ; uberTopCoil:inst4|RecBuf[61]                                                                      ; Clock    ;
; N/A           ; None        ; -0.047 ns ; Usb[10]    ; uberTopCoil:inst4|RecField[2]                                                                     ; Clock    ;
; N/A           ; None        ; -0.059 ns ; Usb[2]     ; uberTopCoil:inst4|RecBuf[10]                                                                      ; Clock    ;
; N/A           ; None        ; -0.059 ns ; Usb[5]     ; uberTopCoil:inst4|RecBuf[5]                                                                       ; Clock    ;
; N/A           ; None        ; -0.060 ns ; Usb[5]     ; uberTopCoil:inst4|RecBuf[45]                                                                      ; Clock    ;
; N/A           ; None        ; -0.073 ns ; Usb[2]     ; uberTopCoil:inst4|RecBuf[18]                                                                      ; Clock    ;
; N/A           ; None        ; -0.076 ns ; Usb[2]     ; uberTopCoil:inst4|RecBuf[74]                                                                      ; Clock    ;
; N/A           ; None        ; -0.076 ns ; Usb[2]     ; uberTopCoil:inst4|RecBuf[34]                                                                      ; Clock    ;
; N/A           ; None        ; -0.077 ns ; Usb[4]     ; uberTopCoil:inst4|RecBuf[36]                                                                      ; Clock    ;
; N/A           ; None        ; -0.077 ns ; Usb[4]     ; uberTopCoil:inst4|RecBuf[76]                                                                      ; Clock    ;
; N/A           ; None        ; -0.084 ns ; Usb[1]     ; uberTopCoil:inst4|RecBuf[17]                                                                      ; Clock    ;
; N/A           ; None        ; -0.089 ns ; Usb[5]     ; uberTopCoil:inst4|RecBuf[69]                                                                      ; Clock    ;
; N/A           ; None        ; -0.093 ns ; Usb[5]     ; uberTopCoil:inst4|RecBuf[53]                                                                      ; Clock    ;
; N/A           ; None        ; -0.093 ns ; Usb[5]     ; uberTopCoil:inst4|RecBuf[29]                                                                      ; Clock    ;
; N/A           ; None        ; -0.097 ns ; Usb[6]     ; uberTopCoil:inst4|RecBuf[78]                                                                      ; Clock    ;
; N/A           ; None        ; -0.098 ns ; Usb[6]     ; uberTopCoil:inst4|RecBuf[38]                                                                      ; Clock    ;
; N/A           ; None        ; -0.099 ns ; Usb[0]     ; uberTopCoil:inst4|RecBuf[8]                                                                       ; Clock    ;
; N/A           ; None        ; -0.113 ns ; Usb[10]    ; uberTopCoil:inst4|Loading                                                                         ; Clock    ;
; N/A           ; None        ; -0.116 ns ; Usb[1]     ; uberTopCoil:inst4|RecBuf[1]                                                                       ; Clock    ;
; N/A           ; None        ; -0.118 ns ; Usb[1]     ; uberTopCoil:inst4|RecBuf[41]                                                                      ; Clock    ;
; N/A           ; None        ; -0.136 ns ; Usb[4]     ; uberTopCoil:inst4|RecBuf[60]                                                                      ; Clock    ;
; N/A           ; None        ; -0.136 ns ; Usb[4]     ; uberTopCoil:inst4|RecBuf[20]                                                                      ; Clock    ;
; N/A           ; None        ; -0.138 ns ; Usb[0]     ; uberTopCoil:inst4|RecBuf[0]                                                                       ; Clock    ;
; N/A           ; None        ; -0.140 ns ; Usb[0]     ; uberTopCoil:inst4|RecBuf[40]                                                                      ; Clock    ;
; N/A           ; None        ; -0.169 ns ; Usb[4]     ; uberTopCoil:inst4|RecBuf[52]                                                                      ; Clock    ;
; N/A           ; None        ; -0.171 ns ; Usb[4]     ; uberTopCoil:inst4|RecBuf[28]                                                                      ; Clock    ;
; N/A           ; None        ; -0.178 ns ; Usb[1]     ; uberTopCoil:inst4|RecBuf[9]                                                                       ; Clock    ;
; N/A           ; None        ; -0.202 ns ; Usb[4]     ; uberTopCoil:inst4|RecBuf[68]                                                                      ; Clock    ;
; N/A           ; None        ; -0.210 ns ; Usb[7]     ; uberTopCoil:inst4|RecBuf[15]                                                                      ; Clock    ;
; N/A           ; None        ; -0.211 ns ; Usb[6]     ; uberTopCoil:inst4|RecBuf[14]                                                                      ; Clock    ;
; N/A           ; None        ; -0.223 ns ; Usb[3]     ; uberTopCoil:inst4|RecBuf[19]                                                                      ; Clock    ;
; N/A           ; None        ; -0.244 ns ; Usb[0]     ; uberTopCoil:inst4|RecBuf[72]                                                                      ; Clock    ;
; N/A           ; None        ; -0.245 ns ; Usb[0]     ; uberTopCoil:inst4|RecBuf[32]                                                                      ; Clock    ;
; N/A           ; None        ; -0.258 ns ; Usb[10]    ; uberTopCoil:inst4|HardReset                                                                       ; Clock    ;
; N/A           ; None        ; -0.265 ns ; Usb[3]     ; uberTopCoil:inst4|RecBuf[3]                                                                       ; Clock    ;
; N/A           ; None        ; -0.265 ns ; Usb[3]     ; uberTopCoil:inst4|RecBuf[43]                                                                      ; Clock    ;
; N/A           ; None        ; -0.270 ns ; Usb[5]     ; uberTopCoil:inst4|RecBuf[13]                                                                      ; Clock    ;
; N/A           ; None        ; -0.281 ns ; Usb[1]     ; uberTopCoil:inst4|RecBuf[25]                                                                      ; Clock    ;
; N/A           ; None        ; -0.284 ns ; Usb[1]     ; uberTopCoil:inst4|RecBuf[49]                                                                      ; Clock    ;
; N/A           ; None        ; -0.284 ns ; Usb[3]     ; uberTopCoil:inst4|RecBuf[67]                                                                      ; Clock    ;
; N/A           ; None        ; -0.292 ns ; Disable-In ; uberTopCoil:inst4|State.011                                                                       ; Clock    ;
; N/A           ; None        ; -0.296 ns ; Usb[10]    ; uberTopCoil:inst4|State.100                                                                       ; Clock    ;
; N/A           ; None        ; -0.296 ns ; Usb[10]    ; uberTopCoil:inst4|State.000                                                                       ; Clock    ;
; N/A           ; None        ; -0.323 ns ; Usb[0]     ; uberTopCoil:inst4|RecBuf[56]                                                                      ; Clock    ;
; N/A           ; None        ; -0.330 ns ; Usb[3]     ; uberTopCoil:inst4|RecBuf[51]                                                                      ; Clock    ;
; N/A           ; None        ; -0.331 ns ; Usb[3]     ; uberTopCoil:inst4|RecBuf[27]                                                                      ; Clock    ;
; N/A           ; None        ; -0.334 ns ; Usb[0]     ; uberTopCoil:inst4|RecBuf[80]                                                                      ; Clock    ;
; N/A           ; None        ; -0.335 ns ; Usb[0]     ; uberTopCoil:inst4|RecBuf[64]                                                                      ; Clock    ;
; N/A           ; None        ; -0.355 ns ; Usb[2]     ; uberTopCoil:inst4|RecBuf[2]                                                                       ; Clock    ;
; N/A           ; None        ; -0.357 ns ; Usb[3]     ; uberTopCoil:inst4|RecBuf[11]                                                                      ; Clock    ;
; N/A           ; None        ; -0.360 ns ; Usb[1]     ; uberTopCoil:inst4|RecBuf[57]                                                                      ; Clock    ;
; N/A           ; None        ; -0.362 ns ; Usb[10]    ; uberTopCoil:inst4|State.001                                                                       ; Clock    ;
; N/A           ; None        ; -0.364 ns ; Usb[8]     ; uberTopCoil:inst4|HardReset                                                                       ; Clock    ;
; N/A           ; None        ; -0.376 ns ; Usb[0]     ; uberTopCoil:inst4|HardReset                                                                       ; Clock    ;
; N/A           ; None        ; -0.382 ns ; Usb[0]     ; uberTopCoil:inst4|RecBuf[48]                                                                      ; Clock    ;
; N/A           ; None        ; -0.383 ns ; Usb[0]     ; uberTopCoil:inst4|RecBuf[24]                                                                      ; Clock    ;
; N/A           ; None        ; -0.405 ns ; Usb[6]     ; uberTopCoil:inst4|RecBuf[70]                                                                      ; Clock    ;
; N/A           ; None        ; -0.411 ns ; Disable-In ; uberTopCoil:inst4|State.000                                                                       ; Clock    ;
; N/A           ; None        ; -0.426 ns ; Usb[2]     ; uberTopCoil:inst4|RecBuf[58]                                                                      ; Clock    ;
; N/A           ; None        ; -0.426 ns ; Usb[2]     ; uberTopCoil:inst4|RecBuf[42]                                                                      ; Clock    ;
; N/A           ; None        ; -0.440 ns ; Usb[6]     ; uberTopCoil:inst4|RecBuf[54]                                                                      ; Clock    ;
; N/A           ; None        ; -0.442 ns ; Usb[6]     ; uberTopCoil:inst4|RecBuf[30]                                                                      ; Clock    ;
; N/A           ; None        ; -0.443 ns ; Usb[2]     ; uberTopCoil:inst4|RecBuf[50]                                                                      ; Clock    ;
; N/A           ; None        ; -0.447 ns ; Usb[2]     ; uberTopCoil:inst4|RecBuf[26]                                                                      ; Clock    ;
; N/A           ; None        ; -0.510 ns ; Usb[0]     ; uberTopCoil:inst4|RecBuf[16]                                                                      ; Clock    ;
; N/A           ; None        ; -0.530 ns ; Usb[9]     ; uberTopCoil:inst4|HardReset                                                                       ; Clock    ;
; N/A           ; None        ; -0.532 ns ; Usb[2]     ; uberTopCoil:inst4|RecBuf[66]                                                                      ; Clock    ;
; N/A           ; None        ; -0.535 ns ; Usb[2]     ; uberTopCoil:inst4|RecBuf[82]                                                                      ; Clock    ;
; N/A           ; None        ; -0.550 ns ; Disable-In ; uberTopCoil:inst4|State.100                                                                       ; Clock    ;
; N/A           ; None        ; -0.770 ns ; DigIn0     ; lpm_counter0:PhaseAccumulator|lpm_counter:lpm_counter_component|cntr_8jj:auto_generated|safe_q[0] ; Clock    ;
; N/A           ; None        ; -0.770 ns ; DigIn0     ; lpm_counter0:PhaseAccumulator|lpm_counter:lpm_counter_component|cntr_8jj:auto_generated|safe_q[1] ; Clock    ;
; N/A           ; None        ; -0.770 ns ; DigIn0     ; lpm_counter0:PhaseAccumulator|lpm_counter:lpm_counter_component|cntr_8jj:auto_generated|safe_q[2] ; Clock    ;
; N/A           ; None        ; -0.770 ns ; DigIn0     ; lpm_counter0:PhaseAccumulator|lpm_counter:lpm_counter_component|cntr_8jj:auto_generated|safe_q[3] ; Clock    ;
; N/A           ; None        ; -0.770 ns ; DigIn0     ; lpm_counter0:PhaseAccumulator|lpm_counter:lpm_counter_component|cntr_8jj:auto_generated|safe_q[4] ; Clock    ;
; N/A           ; None        ; -0.770 ns ; DigIn0     ; lpm_counter0:PhaseAccumulator|lpm_counter:lpm_counter_component|cntr_8jj:auto_generated|safe_q[5] ; Clock    ;
; N/A           ; None        ; -0.770 ns ; DigIn0     ; lpm_counter0:PhaseAccumulator|lpm_counter:lpm_counter_component|cntr_8jj:auto_generated|safe_q[6] ; Clock    ;
; N/A           ; None        ; -0.770 ns ; DigIn0     ; lpm_counter0:PhaseAccumulator|lpm_counter:lpm_counter_component|cntr_8jj:auto_generated|safe_q[7] ; Clock    ;
; N/A           ; None        ; -0.770 ns ; DigIn0     ; lpm_counter0:PhaseAccumulator|lpm_counter:lpm_counter_component|cntr_8jj:auto_generated|safe_q[8] ; Clock    ;
; N/A           ; None        ; -0.770 ns ; DigIn0     ; lpm_counter0:PhaseAccumulator|lpm_counter:lpm_counter_component|cntr_8jj:auto_generated|safe_q[9] ; Clock    ;
; N/A           ; None        ; -0.813 ns ; Usb[10]    ; uberTopCoil:inst4|State.010                                                                       ; Clock    ;
; N/A           ; None        ; -0.896 ns ; Trigger    ; uberTopCoil:inst4|State.010                                                                       ; Clock    ;
; N/A           ; None        ; -1.012 ns ; Usb[3]     ; uberTopCoil:inst4|RecBuf[59]                                                                      ; Clock    ;
; N/A           ; None        ; -1.248 ns ; Usb[10]    ; uberTopCoil:inst4|RecExec[9]                                                                      ; Clock    ;
; N/A           ; None        ; -1.248 ns ; Usb[10]    ; uberTopCoil:inst4|RecExec[8]                                                                      ; Clock    ;
; N/A           ; None        ; -1.281 ns ; Usb[10]    ; uberTopCoil:inst4|RecExec[0]                                                                      ; Clock    ;
; N/A           ; None        ; -1.281 ns ; Usb[10]    ; uberTopCoil:inst4|RecExec[1]                                                                      ; Clock    ;
; N/A           ; None        ; -1.281 ns ; Usb[10]    ; uberTopCoil:inst4|RecExec[2]                                                                      ; Clock    ;
; N/A           ; None        ; -1.281 ns ; Usb[10]    ; uberTopCoil:inst4|RecExec[3]                                                                      ; Clock    ;
; N/A           ; None        ; -1.281 ns ; Usb[10]    ; uberTopCoil:inst4|RecExec[4]                                                                      ; Clock    ;
; N/A           ; None        ; -1.281 ns ; Usb[10]    ; uberTopCoil:inst4|RecExec[6]                                                                      ; Clock    ;
; N/A           ; None        ; -1.307 ns ; Disable-In ; uberTopCoil:inst4|State.010                                                                       ; Clock    ;
; N/A           ; None        ; -1.403 ns ; Usb[8]     ; uberTopCoil:inst4|State.100                                                                       ; Clock    ;
; N/A           ; None        ; -1.432 ns ; Usb[9]     ; uberTopCoil:inst4|State.001                                                                       ; Clock    ;
; N/A           ; None        ; -1.535 ns ; Usb[9]     ; uberTopCoil:inst4|State.100                                                                       ; Clock    ;
; N/A           ; None        ; -1.535 ns ; Usb[9]     ; uberTopCoil:inst4|State.000                                                                       ; Clock    ;
; N/A           ; None        ; -1.560 ns ; Usb[10]    ; uberTopCoil:inst4|RamWren                                                                         ; Clock    ;
; N/A           ; None        ; -1.612 ns ; Usb[8]     ; uberTopCoil:inst4|State.000                                                                       ; Clock    ;
; N/A           ; None        ; -1.846 ns ; Usb[10]    ; uberTopCoil:inst4|RecExec[5]                                                                      ; Clock    ;
; N/A           ; None        ; -1.846 ns ; Usb[10]    ; uberTopCoil:inst4|RecExec[7]                                                                      ; Clock    ;
; N/A           ; None        ; -1.926 ns ; Usb[10]    ; uberTopCoil:inst4|RecNum[9]                                                                       ; Clock    ;
; N/A           ; None        ; -1.926 ns ; Usb[10]    ; uberTopCoil:inst4|RecNum[8]                                                                       ; Clock    ;
; N/A           ; None        ; -1.926 ns ; Usb[10]    ; uberTopCoil:inst4|RecNum[0]                                                                       ; Clock    ;
; N/A           ; None        ; -1.926 ns ; Usb[10]    ; uberTopCoil:inst4|RecNum[1]                                                                       ; Clock    ;
; N/A           ; None        ; -1.926 ns ; Usb[10]    ; uberTopCoil:inst4|RecNum[2]                                                                       ; Clock    ;
; N/A           ; None        ; -1.926 ns ; Usb[10]    ; uberTopCoil:inst4|RecNum[3]                                                                       ; Clock    ;
; N/A           ; None        ; -1.926 ns ; Usb[10]    ; uberTopCoil:inst4|RecNum[4]                                                                       ; Clock    ;
; N/A           ; None        ; -1.926 ns ; Usb[10]    ; uberTopCoil:inst4|RecNum[5]                                                                       ; Clock    ;
; N/A           ; None        ; -1.926 ns ; Usb[10]    ; uberTopCoil:inst4|RecNum[6]                                                                       ; Clock    ;
; N/A           ; None        ; -1.926 ns ; Usb[10]    ; uberTopCoil:inst4|RecNum[7]                                                                       ; Clock    ;
; N/A           ; None        ; -2.003 ns ; Usb[8]     ; uberTopCoil:inst4|State.001                                                                       ; Clock    ;
; N/A           ; None        ; -2.466 ns ; Usb[9]     ; uberTopCoil:inst4|RamAdd[8]                                                                       ; Clock    ;
; N/A           ; None        ; -2.466 ns ; Usb[9]     ; uberTopCoil:inst4|RamAdd[9]                                                                       ; Clock    ;
; N/A           ; None        ; -2.472 ns ; Trigger    ; uberTopCoil:inst4|State.100                                                                       ; Clock    ;
; N/A           ; None        ; -2.681 ns ; Trigger    ; uberTopCoil:inst4|State.000                                                                       ; Clock    ;
; N/A           ; None        ; -2.759 ns ; Usb[9]     ; uberTopCoil:inst4|RamAdd[0]                                                                       ; Clock    ;
; N/A           ; None        ; -2.759 ns ; Usb[9]     ; uberTopCoil:inst4|RamAdd[1]                                                                       ; Clock    ;
; N/A           ; None        ; -2.759 ns ; Usb[9]     ; uberTopCoil:inst4|RamAdd[2]                                                                       ; Clock    ;
; N/A           ; None        ; -2.759 ns ; Usb[9]     ; uberTopCoil:inst4|RamAdd[3]                                                                       ; Clock    ;
; N/A           ; None        ; -2.759 ns ; Usb[9]     ; uberTopCoil:inst4|RamAdd[4]                                                                       ; Clock    ;
; N/A           ; None        ; -2.759 ns ; Usb[9]     ; uberTopCoil:inst4|RamAdd[5]                                                                       ; Clock    ;
; N/A           ; None        ; -2.759 ns ; Usb[9]     ; uberTopCoil:inst4|RamAdd[6]                                                                       ; Clock    ;
; N/A           ; None        ; -2.759 ns ; Usb[9]     ; uberTopCoil:inst4|RamAdd[7]                                                                       ; Clock    ;
; N/A           ; None        ; -3.043 ns ; Usb[8]     ; uberTopCoil:inst4|RamAdd[8]                                                                       ; Clock    ;
; N/A           ; None        ; -3.043 ns ; Usb[8]     ; uberTopCoil:inst4|RamAdd[9]                                                                       ; Clock    ;
; N/A           ; None        ; -3.072 ns ; Trigger    ; uberTopCoil:inst4|State.001                                                                       ; Clock    ;
; N/A           ; None        ; -3.181 ns ; Usb[10]    ; uberTopCoil:inst4|RamAdd[8]                                                                       ; Clock    ;
; N/A           ; None        ; -3.181 ns ; Usb[10]    ; uberTopCoil:inst4|RamAdd[9]                                                                       ; Clock    ;
; N/A           ; None        ; -3.336 ns ; Usb[8]     ; uberTopCoil:inst4|RamAdd[0]                                                                       ; Clock    ;
; N/A           ; None        ; -3.336 ns ; Usb[8]     ; uberTopCoil:inst4|RamAdd[1]                                                                       ; Clock    ;
; N/A           ; None        ; -3.336 ns ; Usb[8]     ; uberTopCoil:inst4|RamAdd[2]                                                                       ; Clock    ;
; N/A           ; None        ; -3.336 ns ; Usb[8]     ; uberTopCoil:inst4|RamAdd[3]                                                                       ; Clock    ;
; N/A           ; None        ; -3.336 ns ; Usb[8]     ; uberTopCoil:inst4|RamAdd[4]                                                                       ; Clock    ;
; N/A           ; None        ; -3.336 ns ; Usb[8]     ; uberTopCoil:inst4|RamAdd[5]                                                                       ; Clock    ;
; N/A           ; None        ; -3.336 ns ; Usb[8]     ; uberTopCoil:inst4|RamAdd[6]                                                                       ; Clock    ;
; N/A           ; None        ; -3.336 ns ; Usb[8]     ; uberTopCoil:inst4|RamAdd[7]                                                                       ; Clock    ;
; N/A           ; None        ; -3.474 ns ; Usb[10]    ; uberTopCoil:inst4|RamAdd[0]                                                                       ; Clock    ;
; N/A           ; None        ; -3.474 ns ; Usb[10]    ; uberTopCoil:inst4|RamAdd[1]                                                                       ; Clock    ;
; N/A           ; None        ; -3.474 ns ; Usb[10]    ; uberTopCoil:inst4|RamAdd[2]                                                                       ; Clock    ;
; N/A           ; None        ; -3.474 ns ; Usb[10]    ; uberTopCoil:inst4|RamAdd[3]                                                                       ; Clock    ;
; N/A           ; None        ; -3.474 ns ; Usb[10]    ; uberTopCoil:inst4|RamAdd[4]                                                                       ; Clock    ;
; N/A           ; None        ; -3.474 ns ; Usb[10]    ; uberTopCoil:inst4|RamAdd[5]                                                                       ; Clock    ;
; N/A           ; None        ; -3.474 ns ; Usb[10]    ; uberTopCoil:inst4|RamAdd[6]                                                                       ; Clock    ;
; N/A           ; None        ; -3.474 ns ; Usb[10]    ; uberTopCoil:inst4|RamAdd[7]                                                                       ; Clock    ;
; N/A           ; None        ; -3.483 ns ; Disable-In ; uberTopCoil:inst4|State.001                                                                       ; Clock    ;
; N/A           ; None        ; -3.768 ns ; Trigger    ; uberTopCoil:inst4|RamAdd[8]                                                                       ; Clock    ;
; N/A           ; None        ; -3.768 ns ; Trigger    ; uberTopCoil:inst4|RamAdd[9]                                                                       ; Clock    ;
; N/A           ; None        ; -4.061 ns ; Trigger    ; uberTopCoil:inst4|RamAdd[0]                                                                       ; Clock    ;
; N/A           ; None        ; -4.061 ns ; Trigger    ; uberTopCoil:inst4|RamAdd[1]                                                                       ; Clock    ;
; N/A           ; None        ; -4.061 ns ; Trigger    ; uberTopCoil:inst4|RamAdd[2]                                                                       ; Clock    ;
; N/A           ; None        ; -4.061 ns ; Trigger    ; uberTopCoil:inst4|RamAdd[3]                                                                       ; Clock    ;
; N/A           ; None        ; -4.061 ns ; Trigger    ; uberTopCoil:inst4|RamAdd[4]                                                                       ; Clock    ;
; N/A           ; None        ; -4.061 ns ; Trigger    ; uberTopCoil:inst4|RamAdd[5]                                                                       ; Clock    ;
; N/A           ; None        ; -4.061 ns ; Trigger    ; uberTopCoil:inst4|RamAdd[6]                                                                       ; Clock    ;
; N/A           ; None        ; -4.061 ns ; Trigger    ; uberTopCoil:inst4|RamAdd[7]                                                                       ; Clock    ;
+---------------+-------------+-----------+------------+---------------------------------------------------------------------------------------------------+----------+


+--------------------------+
; Timing Analyzer Messages ;
+--------------------------+
Info: *******************************************************************
Info: Running Quartus II Classic Timing Analyzer
    Info: Version 7.1 Build 178 06/25/2007 Service Pack 1 SJ Web Edition
    Info: Processing started: Tue Mar 25 17:51:59 2008
Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off TopCoil -c TopCoil --timing_analysis_only
Warning: Found pins functioning as undefined clocks and/or memory enables
    Info: Assuming node "Clock" is an undefined clock
Warning: Found 4 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew
    Info: Detected ripple clock "lpm_counter1:1600KHzClock|lpm_counter:lpm_counter_component|cntr_d0j:auto_generated|safe_q[5]" as buffer
    Info: Detected gated clock "XYselect" as buffer
    Info: Detected ripple clock "lpm_counter2:FreqSetter|lpm_counter:lpm_counter_component|cntr_nkh:auto_generated|safe_q[1]" as buffer
    Info: Detected ripple clock "lpm_counter2:FreqSetter|lpm_counter:lpm_counter_component|cntr_nkh:auto_generated|safe_q[2]" as buffer
Info: Clock "Clock" has Internal fmax of 108.39 MHz between source memory "Ram1Port:RecordHolder|altsyncram:altsyncram_component|altsyncram_r6a1:auto_generated|q_a[60]" and destination register "uberTopCoil:inst4|YRecDone" (period= 9.226 ns)
    Info: + Longest memory to register delay is 8.989 ns
        Info: 1: + IC(0.000 ns) + CELL(0.088 ns) = 0.088 ns; Loc. = M4K_X11_Y14; Fanout = 1; MEM Node = 'Ram1Port:RecordHolder|altsyncram:altsyncram_component|altsyncram_r6a1:auto_generated|q_a[60]'
        Info: 2: + IC(1.004 ns) + CELL(0.393 ns) = 1.485 ns; Loc. = LCCOMB_X12_Y12_N2; Fanout = 1; COMB Node = 'uberTopCoil:inst4|LessThan7~157'
        Info: 3: + IC(0.000 ns) + CELL(0.071 ns) = 1.556 ns; Loc. = LCCOMB_X12_Y12_N4; Fanout = 1; COMB Node = 'uberTopCoil:inst4|LessThan7~159'
        Info: 4: + IC(0.000 ns) + CELL(0.071 ns) = 1.627 ns; Loc. = LCCOMB_X12_Y12_N6; Fanout = 1; COMB Node = 'uberTopCoil:inst4|LessThan7~161'
        Info: 5: + IC(0.000 ns) + CELL(0.071 ns) = 1.698 ns; Loc. = LCCOMB_X12_Y12_N8; Fanout = 1; COMB Node = 'uberTopCoil:inst4|LessThan7~163'
        Info: 6: + IC(0.000 ns) + CELL(0.071 ns) = 1.769 ns; Loc. = LCCOMB_X12_Y12_N10; Fanout = 1; COMB Node = 'uberTopCoil:inst4|LessThan7~165'
        Info: 7: + IC(0.000 ns) + CELL(0.071 ns) = 1.840 ns; Loc. = LCCOMB_X12_Y12_N12; Fanout = 1; COMB Node = 'uberTopCoil:inst4|LessThan7~167'
        Info: 8: + IC(0.000 ns) + CELL(0.159 ns) = 1.999 ns; Loc. = LCCOMB_X12_Y12_N14; Fanout = 1; COMB Node = 'uberTopCoil:inst4|LessThan7~169'
        Info: 9: + IC(0.000 ns) + CELL(0.071 ns) = 2.070 ns; Loc. = LCCOMB_X12_Y12_N16; Fanout = 1; COMB Node = 'uberTopCoil:inst4|LessThan7~171'
        Info: 10: + IC(0.000 ns) + CELL(0.071 ns) = 2.141 ns; Loc. = LCCOMB_X12_Y12_N18; Fanout = 1; COMB Node = 'uberTopCoil:inst4|LessThan7~173'
        Info: 11: + IC(0.000 ns) + CELL(0.071 ns) = 2.212 ns; Loc. = LCCOMB_X12_Y12_N20; Fanout = 1; COMB Node = 'uberTopCoil:inst4|LessThan7~175'
        Info: 12: + IC(0.000 ns) + CELL(0.071 ns) = 2.283 ns; Loc. = LCCOMB_X12_Y12_N22; Fanout = 1; COMB Node = 'uberTopCoil:inst4|LessThan7~177'
        Info: 13: + IC(0.000 ns) + CELL(0.410 ns) = 2.693 ns; Loc. = LCCOMB_X12_Y12_N24; Fanout = 1; COMB Node = 'uberTopCoil:inst4|LessThan7~178'
        Info: 14: + IC(1.136 ns) + CELL(0.150 ns) = 3.979 ns; Loc. = LCCOMB_X21_Y12_N0; Fanout = 26; COMB Node = 'uberTopCoil:inst4|always0~11'
        Info: 15: + IC(0.263 ns) + CELL(0.393 ns) = 4.635 ns; Loc. = LCCOMB_X21_Y12_N8; Fanout = 2; COMB Node = 'uberTopCoil:inst4|Add8~145'
        Info: 16: + IC(0.000 ns) + CELL(0.071 ns) = 4.706 ns; Loc. = LCCOMB_X21_Y12_N10; Fanout = 2; COMB Node = 'uberTopCoil:inst4|Add8~147'
        Info: 17: + IC(0.000 ns) + CELL(0.071 ns) = 4.777 ns; Loc. = LCCOMB_X21_Y12_N12; Fanout = 2; COMB Node = 'uberTopCoil:inst4|Add8~149'
        Info: 18: + IC(0.000 ns) + CELL(0.159 ns) = 4.936 ns; Loc. = LCCOMB_X21_Y12_N14; Fanout = 2; COMB Node = 'uberTopCoil:inst4|Add8~151'
        Info: 19: + IC(0.000 ns) + CELL(0.071 ns) = 5.007 ns; Loc. = LCCOMB_X21_Y12_N16; Fanout = 2; COMB Node = 'uberTopCoil:inst4|Add8~153'
        Info: 20: + IC(0.000 ns) + CELL(0.071 ns) = 5.078 ns; Loc. = LCCOMB_X21_Y12_N18; Fanout = 2; COMB Node = 'uberTopCoil:inst4|Add8~155'
        Info: 21: + IC(0.000 ns) + CELL(0.410 ns) = 5.488 ns; Loc. = LCCOMB_X21_Y12_N20; Fanout = 2; COMB Node = 'uberTopCoil:inst4|Add8~156'
        Info: 22: + IC(0.460 ns) + CELL(0.414 ns) = 6.362 ns; Loc. = LCCOMB_X22_Y12_N12; Fanout = 1; COMB Node = 'uberTopCoil:inst4|LessThan11~169'
        Info: 23: + IC(0.000 ns) + CELL(0.159 ns) = 6.521 ns; Loc. = LCCOMB_X22_Y12_N14; Fanout = 1; COMB Node = 'uberTopCoil:inst4|LessThan11~171'
        Info: 24: + IC(0.000 ns) + CELL(0.071 ns) = 6.592 ns; Loc. = LCCOMB_X22_Y12_N16; Fanout = 1; COMB Node = 'uberTopCoil:inst4|LessThan11~173'
        Info: 25: + IC(0.000 ns) + CELL(0.071 ns) = 6.663 ns; Loc. = LCCOMB_X22_Y12_N18; Fanout = 1; COMB Node = 'uberTopCoil:inst4|LessThan11~175'
        Info: 26: + IC(0.000 ns) + CELL(0.071 ns) = 6.734 ns; Loc. = LCCOMB_X22_Y12_N20; Fanout = 1; COMB Node = 'uberTopCoil:inst4|LessThan11~177'
        Info: 27: + IC(0.000 ns) + CELL(0.410 ns) = 7.144 ns; Loc. = LCCOMB_X22_Y12_N22; Fanout = 1; COMB Node = 'uberTopCoil:inst4|LessThan11~178'
        Info: 28: + IC(1.215 ns) + CELL(0.150 ns) = 8.509 ns; Loc. = LCCOMB_X17_Y9_N30; Fanout = 1; COMB Node = 'uberTopCoil:inst4|Selector56~26'
        Info: 29: + IC(0.246 ns) + CELL(0.150 ns) = 8.905 ns; Loc. = LCCOMB_X17_Y9_N28; Fanout = 1; COMB Node = 'uberTopCoil:inst4|YRecDone~10'
        Info: 30: + IC(0.000 ns) + CELL(0.084 ns) = 8.989 ns; Loc. = LCFF_X17_Y9_N29; Fanout = 58; REG Node = 'uberTopCoil:inst4|YRecDone'
        Info: Total cell delay = 4.665 ns ( 51.90 % )
        Info: Total interconnect delay = 4.324 ns ( 48.10 % )
    Info: - Smallest clock skew is -0.064 ns
        Info: + Shortest clock path from clock "Clock" to destination register is 6.467 ns
            Info: 1: + IC(0.000 ns) + CELL(0.979 ns) = 0.979 ns; Loc. = PIN_17; Fanout = 4; CLK Node = 'Clock'
            Info: 2: + IC(1.428 ns) + CELL(0.787 ns) = 3.194 ns; Loc. = LCFF_X28_Y8_N27; Fanout = 4; REG Node = 'lpm_counter1:1600KHzClock|lpm_counter:lpm_counter_component|cntr_d0j:auto_generated|safe_q[5]'
            Info: 3: + IC(1.986 ns) + CELL(0.000 ns) = 5.180 ns; Loc. = CLKCTRL_G0; Fanout = 710; COMB Node = 'lpm_counter1:1600KHzClock|lpm_counter:lpm_counter_component|cntr_d0j:auto_generated|safe_q[5]~clkctrl'
            Info: 4: + IC(0.750 ns) + CELL(0.537 ns) = 6.467 ns; Loc. = LCFF_X17_Y9_N29; Fanout = 58; REG Node = 'uberTopCoil:inst4|YRecDone'
            Info: Total cell delay = 2.303 ns ( 35.61 % )
            Info: Total interconnect delay = 4.164 ns ( 64.39 % )
        Info: - Longest clock path from clock "Clock" to source memory is 6.531 ns
            Info: 1: + IC(0.000 ns) + CELL(0.979 ns) = 0.979 ns; Loc. = PIN_17; Fanout = 4; CLK Node = 'Clock'
            Info: 2: + IC(1.428 ns) + CELL(0.787 ns) = 3.194 ns; Loc. = LCFF_X28_Y8_N27; Fanout = 4; REG Node = 'lpm_counter1:1600KHzClock|lpm_counter:lpm_counter_component|cntr_d0j:auto_generated|safe_q[5]'
            Info: 3: + IC(1.986 ns) + CELL(0.000 ns) = 5.180 ns; Loc. = CLKCTRL_G0; Fanout = 710; COMB Node = 'lpm_counter1:1600KHzClock|lpm_counter:lpm_counter_component|cntr_d0j:auto_generated|safe_q[5]~clkctrl'
            Info: 4: + IC(0.716 ns) + CELL(0.635 ns) = 6.531 ns; Loc. = M4K_X11_Y14; Fanout = 1; MEM Node = 'Ram1Port:RecordHolder|altsyncram:altsyncram_component|altsyncram_r6a1:auto_generated|q_a[60]'
            Info: Total cell delay = 2.401 ns ( 36.76 % )
            Info: Total interconnect delay = 4.130 ns ( 63.24 % )
    Info: + Micro clock to output delay of source is 0.209 ns
    Info: + Micro setup delay of destination is -0.036 ns
Info: tsu for register "uberTopCoil:inst4|RamAdd[0]" (data pin = "Trigger", clock pin = "Clock") is 4.291 ns
    Info: + Longest pin to register delay is 10.823 ns
        Info: 1: + IC(0.000 ns) + CELL(0.862 ns) = 0.862 ns; Loc. = PIN_3; Fanout = 3; PIN Node = 'Trigger'
        Info: 2: + IC(5.668 ns) + CELL(0.150 ns) = 6.680 ns; Loc. = LCCOMB_X13_Y6_N8; Fanout = 2; COMB Node = 'uberTopCoil:inst4|always0~2'
        Info: 3: + IC(0.468 ns) + CELL(0.398 ns) = 7.546 ns; Loc. = LCCOMB_X14_Y6_N2; Fanout = 1; COMB Node = 'uberTopCoil:inst4|RamAdd[9]~442'
        Info: 4: + IC(0.256 ns) + CELL(0.420 ns) = 8.222 ns; Loc. = LCCOMB_X14_Y6_N28; Fanout = 1; COMB Node = 'uberTopCoil:inst4|RamAdd[9]~443'
        Info: 5: + IC(0.256 ns) + CELL(0.393 ns) = 8.871 ns; Loc. = LCCOMB_X14_Y6_N22; Fanout = 10; COMB Node = 'uberTopCoil:inst4|RamAdd[0]~444'
        Info: 6: + IC(1.292 ns) + CELL(0.660 ns) = 10.823 ns; Loc. = LCFF_X16_Y7_N1; Fanout = 21; REG Node = 'uberTopCoil:inst4|RamAdd[0]'
        Info: Total cell delay = 2.883 ns ( 26.64 % )
        Info: Total interconnect delay = 7.940 ns ( 73.36 % )
    Info: + Micro setup delay of destination is -0.036 ns
    Info: - Shortest clock path from clock "Clock" to destination register is 6.496 ns
        Info: 1: + IC(0.000 ns) + CELL(0.979 ns) = 0.979 ns; Loc. = PIN_17; Fanout = 4; CLK Node = 'Clock'
        Info: 2: + IC(1.428 ns) + CELL(0.787 ns) = 3.194 ns; Loc. = LCFF_X28_Y8_N27; Fanout = 4; REG Node = 'lpm_counter1:1600KHzClock|lpm_counter:lpm_counter_component|cntr_d0j:auto_generated|safe_q[5]'
        Info: 3: + IC(1.986 ns) + CELL(0.000 ns) = 5.180 ns; Loc. = CLKCTRL_G0; Fanout = 710; COMB Node = 'lpm_counter1:1600KHzClock|lpm_counter:lpm_counter_component|cntr_d0j:auto_generated|safe_q[5]~clkctrl'
        Info: 4: + IC(0.779 ns) + CELL(0.537 ns) = 6.496 ns; Loc. = LCFF_X16_Y7_N1; Fanout = 21; REG Node = 'uberTopCoil:inst4|RamAdd[0]'
        Info: Total cell delay = 2.303 ns ( 35.45 % )
        Info: Total interconnect delay = 4.193 ns ( 64.55 % )
Info: tco from clock "Clock" to destination pin "Phi[0]" through register "uberTopCoil:inst4|EnableXYdacs" is 13.418 ns
    Info: + Longest clock path from clock "Clock" to source register is 6.463 ns
        Info: 1: + IC(0.000 ns) + CELL(0.979 ns) = 0.979 ns; Loc. = PIN_17; Fanout = 4; CLK Node = 'Clock'
        Info: 2: + IC(1.428 ns) + CELL(0.787 ns) = 3.194 ns; Loc. = LCFF_X28_Y8_N27; Fanout = 4; REG Node = 'lpm_counter1:1600KHzClock|lpm_counter:lpm_counter_component|cntr_d0j:auto_generated|safe_q[5]'
        Info: 3: + IC(1.986 ns) + CELL(0.000 ns) = 5.180 ns; Loc. = CLKCTRL_G0; Fanout = 710; COMB Node = 'lpm_counter1:1600KHzClock|lpm_counter:lpm_counter_component|cntr_d0j:auto_generated|safe_q[5]~clkctrl'
        Info: 4: + IC(0.746 ns) + CELL(0.537 ns) = 6.463 ns; Loc. = LCFF_X12_Y9_N17; Fanout = 13; REG Node = 'uberTopCoil:inst4|EnableXYdacs'
        Info: Total cell delay = 2.303 ns ( 35.63 % )
        Info: Total interconnect delay = 4.160 ns ( 64.37 % )
    Info: + Micro clock to output delay of source is 0.250 ns
    Info: + Longest register to pin delay is 6.705 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X12_Y9_N17; Fanout = 13; REG Node = 'uberTopCoil:inst4|EnableXYdacs'
        Info: 2: + IC(2.072 ns) + CELL(0.420 ns) = 2.492 ns; Loc. = LCCOMB_X28_Y4_N10; Fanout = 1; COMB Node = 'lpm_mux0:AmplitudeMux|lpm_mux:lpm_mux_component|mux_aoc:auto_generated|result_node[0]~734'
        Info: 3: + IC(1.135 ns) + CELL(3.078 ns) = 6.705 ns; Loc. = PIN_60; Fanout = 0; PIN Node = 'Phi[0]'
        Info: Total cell delay = 3.498 ns ( 52.17 % )
        Info: Total interconnect delay = 3.207 ns ( 47.83 % )
Info: th for register "uberTopCoil:inst4|RecField[1]" (data pin = "Usb[10]", clock pin = "Clock") is 0.539 ns
    Info: + Longest clock path from clock "Clock" to destination register is 6.486 ns
        Info: 1: + IC(0.000 ns) + CELL(0.979 ns) = 0.979 ns; Loc. = PIN_17; Fanout = 4; CLK Node = 'Clock'
        Info: 2: + IC(1.428 ns) + CELL(0.787 ns) = 3.194 ns; Loc. = LCFF_X28_Y8_N27; Fanout = 4; REG Node = 'lpm_counter1:1600KHzClock|lpm_counter:lpm_counter_component|cntr_d0j:auto_generated|safe_q[5]'
        Info: 3: + IC(1.986 ns) + CELL(0.000 ns) = 5.180 ns; Loc. = CLKCTRL_G0; Fanout = 710; COMB Node = 'lpm_counter1:1600KHzClock|lpm_counter:lpm_counter_component|cntr_d0j:auto_generated|safe_q[5]~clkctrl'
        Info: 4: + IC(0.769 ns) + CELL(0.537 ns) = 6.486 ns; Loc. = LCFF_X12_Y8_N27; Fanout = 18; REG Node = 'uberTopCoil:inst4|RecField[1]'
        Info: Total cell delay = 2.303 ns ( 35.51 % )
        Info: Total interconnect delay = 4.183 ns ( 64.49 % )
    Info: + Micro hold delay of destination is 0.266 ns
    Info: - Shortest pin to register delay is 6.213 ns
        Info: 1: + IC(0.000 ns) + CELL(0.852 ns) = 0.852 ns; Loc. = PIN_24; Fanout = 13; PIN Node = 'Usb[10]'
        Info: 2: + IC(5.127 ns) + CELL(0.150 ns) = 6.129 ns; Loc. = LCCOMB_X12_Y8_N26; Fanout = 1; COMB Node = 'uberTopCoil:inst4|RecField[1]~56'
        Info: 3: + IC(0.000 ns) + CELL(0.084 ns) = 6.213 ns; Loc. = LCFF_X12_Y8_N27; Fanout = 18; REG Node = 'uberTopCoil:inst4|RecField[1]'
        Info: Total cell delay = 1.086 ns ( 17.48 % )
        Info: Total interconnect delay = 5.127 ns ( 82.52 % )
Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 2 warnings
    Info: Allocated 117 megabytes of memory during processing
    Info: Processing ended: Tue Mar 25 17:52:01 2008
    Info: Elapsed time: 00:00:02


