Analysis & Synthesis report for CoincidenceCounter
Thu Aug 20 13:11:51 2015
Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Analysis & Synthesis Summary
  3. Analysis & Synthesis Settings
  4. Parallel Compilation
  5. Analysis & Synthesis IP Cores Summary
  6. Analysis & Synthesis Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2013 Altera Corporation
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and other software and tools, and its AMPP partner logic 
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(including device programming or simulation files), and any 
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Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+---------------------------------------------------------------------------+
; Analysis & Synthesis Summary                                              ;
+-----------------------------+---------------------------------------------+
; Analysis & Synthesis Status ; Failed - Thu Aug 20 13:11:51 2015           ;
; Quartus II 64-Bit Version   ; 13.1.0 Build 162 10/23/2013 SJ Full Version ;
; Revision Name               ; CoincidenceCounter                          ;
; Top-level Entity Name       ; CoincidenceCounter                          ;
; Family                      ; Cyclone V                                   ;
; Logic utilization (in ALMs) ; N/A until Partition Merge                   ;
; Total registers             ; N/A until Partition Merge                   ;
; Total pins                  ; N/A until Partition Merge                   ;
; Total virtual pins          ; N/A until Partition Merge                   ;
; Total block memory bits     ; N/A until Partition Merge                   ;
; Total PLLs                  ; N/A until Partition Merge                   ;
; Total DLLs                  ; N/A until Partition Merge                   ;
+-----------------------------+---------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Settings                                                                                             ;
+---------------------------------------------------------------------------------+--------------------+--------------------+
; Option                                                                          ; Setting            ; Default Value      ;
+---------------------------------------------------------------------------------+--------------------+--------------------+
; Device                                                                          ; 5CEBA4F23C7        ;                    ;
; Top-level entity name                                                           ; CoincidenceCounter ; CoincidenceCounter ;
; Family name                                                                     ; Cyclone V          ; Stratix II         ;
; Use smart compilation                                                           ; On                 ; Off                ;
; Maximum processors allowed for parallel compilation                             ; All                ; 1                  ;
; Preserve fewer node names                                                       ; Off                ; On                 ;
; Verilog Show LMF Mapping Messages                                               ; Off                ;                    ;
; Verilog Version                                                                 ; SystemVerilog_2005 ; Verilog_2001       ;
; Perform WYSIWYG Primitive Resynthesis                                           ; On                 ; Off                ;
; Enable parallel Assembler and TimeQuest Timing Analyzer during compilation      ; On                 ; On                 ;
; Enable compact report table                                                     ; Off                ; Off                ;
; Restructure Multiplexers                                                        ; Auto               ; Auto               ;
; MLAB Add Timing Constraints For Mixed-Port Feed-Through Mode Setting Don't Care ; Off                ; Off                ;
; Create Debugging Nodes for IP Cores                                             ; Off                ; Off                ;
; Disable OpenCore Plus hardware evaluation                                       ; Off                ; Off                ;
; VHDL Version                                                                    ; VHDL_1993          ; VHDL_1993          ;
; State Machine Processing                                                        ; Auto               ; Auto               ;
; Safe State Machine                                                              ; Off                ; Off                ;
; Extract Verilog State Machines                                                  ; On                 ; On                 ;
; Extract VHDL State Machines                                                     ; On                 ; On                 ;
; Ignore Verilog initial constructs                                               ; Off                ; Off                ;
; Iteration limit for constant Verilog loops                                      ; 5000               ; 5000               ;
; Iteration limit for non-constant Verilog loops                                  ; 250                ; 250                ;
; Add Pass-Through Logic to Inferred RAMs                                         ; On                 ; On                 ;
; Infer RAMs from Raw Logic                                                       ; On                 ; On                 ;
; Parallel Synthesis                                                              ; On                 ; On                 ;
; DSP Block Balancing                                                             ; Auto               ; Auto               ;
; NOT Gate Push-Back                                                              ; On                 ; On                 ;
; Power-Up Don't Care                                                             ; On                 ; On                 ;
; Remove Redundant Logic Cells                                                    ; Off                ; Off                ;
; Remove Duplicate Registers                                                      ; On                 ; On                 ;
; Ignore CARRY Buffers                                                            ; Off                ; Off                ;
; Ignore CASCADE Buffers                                                          ; Off                ; Off                ;
; Ignore GLOBAL Buffers                                                           ; Off                ; Off                ;
; Ignore ROW GLOBAL Buffers                                                       ; Off                ; Off                ;
; Ignore LCELL Buffers                                                            ; Off                ; Off                ;
; Ignore SOFT Buffers                                                             ; On                 ; On                 ;
; Limit AHDL Integers to 32 Bits                                                  ; Off                ; Off                ;
; Optimization Technique                                                          ; Balanced           ; Balanced           ;
; Carry Chain Length                                                              ; 70                 ; 70                 ;
; Auto Carry Chains                                                               ; On                 ; On                 ;
; Auto Open-Drain Pins                                                            ; On                 ; On                 ;
; Auto ROM Replacement                                                            ; On                 ; On                 ;
; Auto RAM Replacement                                                            ; On                 ; On                 ;
; Auto DSP Block Replacement                                                      ; On                 ; On                 ;
; Auto Shift Register Replacement                                                 ; Auto               ; Auto               ;
; Allow Shift Register Merging across Hierarchies                                 ; Auto               ; Auto               ;
; Auto Clock Enable Replacement                                                   ; On                 ; On                 ;
; Strict RAM Replacement                                                          ; Off                ; Off                ;
; Allow Synchronous Control Signals                                               ; On                 ; On                 ;
; Force Use of Synchronous Clear Signals                                          ; Off                ; Off                ;
; Auto Resource Sharing                                                           ; Off                ; Off                ;
; Allow Any RAM Size For Recognition                                              ; Off                ; Off                ;
; Allow Any ROM Size For Recognition                                              ; Off                ; Off                ;
; Allow Any Shift Register Size For Recognition                                   ; Off                ; Off                ;
; Use LogicLock Constraints during Resource Balancing                             ; On                 ; On                 ;
; Ignore translate_off and synthesis_off directives                               ; Off                ; Off                ;
; Timing-Driven Synthesis                                                         ; On                 ; On                 ;
; Report Parameter Settings                                                       ; On                 ; On                 ;
; Report Source Assignments                                                       ; On                 ; On                 ;
; Report Connectivity Checks                                                      ; On                 ; On                 ;
; Ignore Maximum Fan-Out Assignments                                              ; Off                ; Off                ;
; Synchronization Register Chain Length                                           ; 3                  ; 3                  ;
; PowerPlay Power Optimization                                                    ; Normal compilation ; Normal compilation ;
; HDL message level                                                               ; Level2             ; Level2             ;
; Suppress Register Optimization Related Messages                                 ; Off                ; Off                ;
; Number of Removed Registers Reported in Synthesis Report                        ; 100                ; 100                ;
; Number of Swept Nodes Reported in Synthesis Report                              ; 5000               ; 5000               ;
; Number of Inverted Registers Reported in Synthesis Report                       ; 100                ; 100                ;
; Clock MUX Protection                                                            ; On                 ; On                 ;
; Auto Gated Clock Conversion                                                     ; Off                ; Off                ;
; Block Design Naming                                                             ; Auto               ; Auto               ;
; SDC constraint protection                                                       ; Off                ; Off                ;
; Synthesis Effort                                                                ; Auto               ; Auto               ;
; Shift Register Replacement - Allow Asynchronous Clear Signal                    ; On                 ; On                 ;
; Pre-Mapping Resynthesis Optimization                                            ; Off                ; Off                ;
; Analysis & Synthesis Message Level                                              ; Medium             ; Medium             ;
; Disable Register Merging Across Hierarchies                                     ; Auto               ; Auto               ;
; Resource Aware Inference For Block RAM                                          ; On                 ; On                 ;
; Synthesis Seed                                                                  ; 1                  ; 1                  ;
; Automatic Parallel Synthesis                                                    ; On                 ; On                 ;
+---------------------------------------------------------------------------------+--------------------+--------------------+


+------------------------------------------+
; Parallel Compilation                     ;
+----------------------------+-------------+
; Processors                 ; Number      ;
+----------------------------+-------------+
; Number detected on machine ; 4           ;
; Maximum allowed            ; 2           ;
;                            ;             ;
; Average used               ; 1.00        ;
; Maximum used               ; 1           ;
;                            ;             ;
; Usage by Processor         ; % Time Used ;
;     Processor 1            ; 100.0%      ;
;     Processors 2-4         ;   0.0%      ;
+----------------------------+-------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis IP Cores Summary                                                                                                                                              ;
+--------+--------------+---------+--------------+--------------+-----------------------------------------------+--------------------------------------------------------------------+
; Vendor ; IP Core Name ; Version ; Release Date ; License Type ; Entity Instance                               ; IP Include File                                                    ;
+--------+--------------+---------+--------------+--------------+-----------------------------------------------+--------------------------------------------------------------------+
; Altera ; LPM_RAM_DP   ; N/A     ; N/A          ; N/A          ; |CoincidenceCounter|lpm_ram_dp0:Counter_Block ; C:/Projects/Archives/2008 Coincidence Counter/Altera/lpm_ram_dp0.v ;
+--------+--------------+---------+--------------+--------------+-----------------------------------------------+--------------------------------------------------------------------+


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II 64-Bit Analysis & Synthesis
    Info: Version 13.1.0 Build 162 10/23/2013 SJ Full Version
    Info: Processing started: Thu Aug 20 13:11:32 2015
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off CoincidenceCounter -c CoincidenceCounter
Info (11104): Parallel Compilation has detected 4 hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use 2 of the 2 physical processors detected instead.
Info (12021): Found 1 design units, including 1 entities, in source file coincidencecounter.bdf
    Info (12023): Found entity 1: CoincidenceCounter
Info (12021): Found 1 design units, including 1 entities, in source file coincidenceasyncinput.bdf
    Info (12023): Found entity 1: CoincidenceAsyncInput
Info (12021): Found 1 design units, including 1 entities, in source file coincidencecounter.v
    Info (12023): Found entity 1: CoinCounter
Info (12021): Found 1 design units, including 1 entities, in source file rabbitcontrol.v
    Info (12023): Found entity 1: RabbitControl
Info (12021): Found 1 design units, including 1 entities, in source file lpm_ram_dp0.v
    Info (12023): Found entity 1: lpm_ram_dp0
Info (12021): Found 1 design units, including 1 entities, in source file lpm_add_sub0.v
    Info (12023): Found entity 1: lpm_add_sub0
Info (12021): Found 1 design units, including 1 entities, in source file lpm_or0.tdf
    Info (12023): Found entity 1: lpm_or0
Info (12021): Found 1 design units, including 1 entities, in source file altpll0.v
    Info (12023): Found entity 1: altpll0
Warning (12136): Clear box output file C:/Projects/Archives/2008 Coincidence Counter/Altera/altfp_div0.v is not compatible with the current compile. Used regenerated output file C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altfp_div0.v for elaboration
Info (12021): Found 3 design units, including 3 entities, in source file db/altfp_div0.v
    Info (12023): Found entity 1: altfp_div0_altfp_div_pst_d7h
    Info (12023): Found entity 2: altfp_div0_altfp_div_1bh
    Info (12023): Found entity 3: altfp_div0
Info (12127): Elaborating entity "CoincidenceCounter" for the top level hierarchy
Info (12128): Elaborating entity "RabbitControl" for hierarchy "RabbitControl:inst"
Info (12128): Elaborating entity "lpm_ram_dp0" for hierarchy "lpm_ram_dp0:Counter_Block"
Info (12128): Elaborating entity "altsyncram" for hierarchy "lpm_ram_dp0:Counter_Block|altsyncram:altsyncram_component"
Info (12130): Elaborated megafunction instantiation "lpm_ram_dp0:Counter_Block|altsyncram:altsyncram_component"
Info (12133): Instantiated megafunction "lpm_ram_dp0:Counter_Block|altsyncram:altsyncram_component" with the following parameter:
    Info (12134): Parameter "address_reg_b" = "CLOCK0"
    Info (12134): Parameter "clock_enable_input_a" = "BYPASS"
    Info (12134): Parameter "clock_enable_input_b" = "BYPASS"
    Info (12134): Parameter "clock_enable_output_a" = "BYPASS"
    Info (12134): Parameter "clock_enable_output_b" = "BYPASS"
    Info (12134): Parameter "indata_reg_b" = "CLOCK0"
    Info (12134): Parameter "intended_device_family" = "Cyclone III"
    Info (12134): Parameter "lpm_type" = "altsyncram"
    Info (12134): Parameter "numwords_a" = "2048"
    Info (12134): Parameter "numwords_b" = "2048"
    Info (12134): Parameter "operation_mode" = "BIDIR_DUAL_PORT"
    Info (12134): Parameter "outdata_aclr_a" = "NONE"
    Info (12134): Parameter "outdata_aclr_b" = "NONE"
    Info (12134): Parameter "outdata_reg_a" = "UNREGISTERED"
    Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED"
    Info (12134): Parameter "power_up_uninitialized" = "FALSE"
    Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE"
    Info (12134): Parameter "read_during_write_mode_port_a" = "OLD_DATA"
    Info (12134): Parameter "read_during_write_mode_port_b" = "OLD_DATA"
    Info (12134): Parameter "widthad_a" = "11"
    Info (12134): Parameter "widthad_b" = "11"
    Info (12134): Parameter "width_a" = "32"
    Info (12134): Parameter "width_b" = "32"
    Info (12134): Parameter "width_byteena_a" = "1"
    Info (12134): Parameter "width_byteena_b" = "1"
    Info (12134): Parameter "wrcontrol_wraddress_reg_b" = "CLOCK0"
Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_qdl2.tdf
    Info (12023): Found entity 1: altsyncram_qdl2
Info (12128): Elaborating entity "altsyncram_qdl2" for hierarchy "lpm_ram_dp0:Counter_Block|altsyncram:altsyncram_component|altsyncram_qdl2:auto_generated"
Error (14000): WYSIWYG RAM primitive "ram_block1a0" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 40
Error (14000): WYSIWYG RAM primitive "ram_block1a0" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 40
Error (14000): WYSIWYG RAM primitive "ram_block1a1" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 73
Error (14000): WYSIWYG RAM primitive "ram_block1a1" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 73
Error (14000): WYSIWYG RAM primitive "ram_block1a2" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 106
Error (14000): WYSIWYG RAM primitive "ram_block1a2" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 106
Error (14000): WYSIWYG RAM primitive "ram_block1a3" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 139
Error (14000): WYSIWYG RAM primitive "ram_block1a3" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 139
Error (14000): WYSIWYG RAM primitive "ram_block1a4" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 172
Error (14000): WYSIWYG RAM primitive "ram_block1a4" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 172
Error (14000): WYSIWYG RAM primitive "ram_block1a5" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 205
Error (14000): WYSIWYG RAM primitive "ram_block1a5" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 205
Error (14000): WYSIWYG RAM primitive "ram_block1a6" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 238
Error (14000): WYSIWYG RAM primitive "ram_block1a6" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 238
Error (14000): WYSIWYG RAM primitive "ram_block1a7" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 271
Error (14000): WYSIWYG RAM primitive "ram_block1a7" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 271
Error (14000): WYSIWYG RAM primitive "ram_block1a8" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 304
Error (14000): WYSIWYG RAM primitive "ram_block1a8" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 304
Error (14000): WYSIWYG RAM primitive "ram_block1a9" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 337
Error (14000): WYSIWYG RAM primitive "ram_block1a9" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 337
Error (14000): WYSIWYG RAM primitive "ram_block1a10" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 370
Error (14000): WYSIWYG RAM primitive "ram_block1a10" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 370
Error (14000): WYSIWYG RAM primitive "ram_block1a11" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 403
Error (14000): WYSIWYG RAM primitive "ram_block1a11" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 403
Error (14000): WYSIWYG RAM primitive "ram_block1a12" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 436
Error (14000): WYSIWYG RAM primitive "ram_block1a12" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 436
Error (14000): WYSIWYG RAM primitive "ram_block1a13" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 469
Error (14000): WYSIWYG RAM primitive "ram_block1a13" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 469
Error (14000): WYSIWYG RAM primitive "ram_block1a14" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 502
Error (14000): WYSIWYG RAM primitive "ram_block1a14" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 502
Error (14000): WYSIWYG RAM primitive "ram_block1a15" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 535
Error (14000): WYSIWYG RAM primitive "ram_block1a15" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 535
Error (14000): WYSIWYG RAM primitive "ram_block1a16" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 568
Error (14000): WYSIWYG RAM primitive "ram_block1a16" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 568
Error (14000): WYSIWYG RAM primitive "ram_block1a17" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 601
Error (14000): WYSIWYG RAM primitive "ram_block1a17" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 601
Error (14000): WYSIWYG RAM primitive "ram_block1a18" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 634
Error (14000): WYSIWYG RAM primitive "ram_block1a18" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 634
Error (14000): WYSIWYG RAM primitive "ram_block1a19" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 667
Error (14000): WYSIWYG RAM primitive "ram_block1a19" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 667
Error (14000): WYSIWYG RAM primitive "ram_block1a20" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 700
Error (14000): WYSIWYG RAM primitive "ram_block1a20" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 700
Error (14000): WYSIWYG RAM primitive "ram_block1a21" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 733
Error (14000): WYSIWYG RAM primitive "ram_block1a21" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 733
Error (14000): WYSIWYG RAM primitive "ram_block1a22" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 766
Error (14000): WYSIWYG RAM primitive "ram_block1a22" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 766
Error (14000): WYSIWYG RAM primitive "ram_block1a23" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 799
Error (14000): WYSIWYG RAM primitive "ram_block1a23" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 799
Error (14000): WYSIWYG RAM primitive "ram_block1a24" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 832
Error (14000): WYSIWYG RAM primitive "ram_block1a24" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 832
Error (14000): WYSIWYG RAM primitive "ram_block1a25" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 865
Error (14000): WYSIWYG RAM primitive "ram_block1a25" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 865
Error (14000): WYSIWYG RAM primitive "ram_block1a26" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 898
Error (14000): WYSIWYG RAM primitive "ram_block1a26" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 898
Error (14000): WYSIWYG RAM primitive "ram_block1a27" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 931
Error (14000): WYSIWYG RAM primitive "ram_block1a27" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 931
Error (14000): WYSIWYG RAM primitive "ram_block1a28" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 964
Error (14000): WYSIWYG RAM primitive "ram_block1a28" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 964
Error (14000): WYSIWYG RAM primitive "ram_block1a29" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 997
Error (14000): WYSIWYG RAM primitive "ram_block1a29" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 997
Error (14000): WYSIWYG RAM primitive "ram_block1a30" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 1030
Error (14000): WYSIWYG RAM primitive "ram_block1a30" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 1030
Error (14000): WYSIWYG RAM primitive "ram_block1a31" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_a_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 1063
Error (14000): WYSIWYG RAM primitive "ram_block1a31" in operation mode "bidir_dual_port" uses an unsupported value for parameter "port_b_read_during_write_mode"  File: C:/Projects/Archives/2008 Coincidence Counter/Altera/db/altsyncram_qdl2.tdf Line: 1063
Error (12152): Can't elaborate user hierarchy "lpm_ram_dp0:Counter_Block|altsyncram:altsyncram_component|altsyncram_qdl2:auto_generated" File: c:/altera/13.1/quartus/libraries/megafunctions/altsyncram.tdf Line: 791
Error: Quartus II 64-Bit Analysis & Synthesis was unsuccessful. 65 errors, 1 warning
    Error: Peak virtual memory: 525 megabytes
    Error: Processing ended: Thu Aug 20 13:11:52 2015
    Error: Elapsed time: 00:00:20
    Error: Total CPU time (on all processors): 00:00:02


