| Hierarchy | Input | Constant Input | Unused Input | Floating Input | Output | Constant Output | Unused Output | Floating Output | Bidir | Constant Bidir | Unused Bidir | Input only Bidir | Output only Bidir | 
| EnetCtrl25MHz|altpll_component|auto_generated | 2 | 0 | 0 | 0 | 7 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| EnetCtrl25MHz | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|irq_mapper | 4 | 30 | 2 | 30 | 32 | 30 | 30 | 30 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|crosser_001|clock_xer | 115 | 0 | 0 | 0 | 111 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|crosser_001 | 117 | 2 | 0 | 2 | 111 | 2 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|crosser|clock_xer | 115 | 0 | 0 | 0 | 111 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|crosser | 117 | 2 | 0 | 2 | 111 | 2 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|rsp_xbar_mux_001|arb|adder | 36 | 18 | 0 | 18 | 18 | 18 | 18 | 18 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|rsp_xbar_mux_001|arb | 13 | 0 | 4 | 0 | 9 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|rsp_xbar_mux_001 | 993 | 0 | 0 | 0 | 119 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|rsp_xbar_mux|arb|adder | 12 | 6 | 0 | 6 | 6 | 6 | 6 | 6 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|rsp_xbar_mux|arb | 7 | 0 | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|rsp_xbar_mux | 333 | 0 | 0 | 0 | 113 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|rsp_xbar_demux_008 | 113 | 1 | 2 | 1 | 111 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|rsp_xbar_demux_007 | 113 | 1 | 2 | 1 | 111 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|rsp_xbar_demux_006 | 113 | 1 | 2 | 1 | 111 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|rsp_xbar_demux_005 | 113 | 1 | 2 | 1 | 111 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|rsp_xbar_demux_004 | 113 | 1 | 2 | 1 | 111 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|rsp_xbar_demux_003 | 113 | 1 | 2 | 1 | 111 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|rsp_xbar_demux_002 | 114 | 4 | 2 | 4 | 221 | 4 | 4 | 4 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|rsp_xbar_demux_001 | 114 | 4 | 2 | 4 | 221 | 4 | 4 | 4 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|rsp_xbar_demux | 114 | 4 | 2 | 4 | 221 | 4 | 4 | 4 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|cmd_xbar_mux_002|arb|adder | 8 | 2 | 0 | 2 | 4 | 2 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|cmd_xbar_mux_002|arb | 6 | 0 | 1 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|cmd_xbar_mux_002 | 223 | 0 | 0 | 0 | 112 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|cmd_xbar_mux_001|arb|adder | 8 | 2 | 0 | 2 | 4 | 2 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|cmd_xbar_mux_001|arb | 6 | 0 | 1 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|cmd_xbar_mux_001 | 223 | 0 | 0 | 0 | 112 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|cmd_xbar_mux|arb|adder | 8 | 2 | 0 | 2 | 4 | 2 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|cmd_xbar_mux|arb | 6 | 0 | 1 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|cmd_xbar_mux | 223 | 0 | 0 | 0 | 112 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|cmd_xbar_demux_001 | 121 | 81 | 2 | 81 | 991 | 81 | 81 | 81 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|cmd_xbar_demux | 115 | 9 | 2 | 9 | 331 | 9 | 9 | 9 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|rst_controller_003|alt_rst_sync_uq1 | 2 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|rst_controller_003 | 17 | 14 | 0 | 14 | 1 | 14 | 14 | 14 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|rst_controller_002|alt_rst_sync_uq1 | 2 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|rst_controller_002 | 17 | 14 | 0 | 14 | 1 | 14 | 14 | 14 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|rst_controller_001|alt_rst_sync_uq1 | 2 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|rst_controller_001 | 17 | 15 | 0 | 15 | 1 | 15 | 15 | 15 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|rst_controller|alt_rst_sync_uq1 | 2 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|rst_controller | 17 | 14 | 0 | 14 | 1 | 14 | 14 | 14 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|id_router_008|the_default_decode | 0 | 13 | 0 | 13 | 13 | 13 | 13 | 13 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|id_router_008 | 104 | 0 | 2 | 0 | 111 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|id_router_007|the_default_decode | 0 | 13 | 0 | 13 | 13 | 13 | 13 | 13 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|id_router_007 | 104 | 0 | 2 | 0 | 111 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|id_router_006|the_default_decode | 0 | 13 | 0 | 13 | 13 | 13 | 13 | 13 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|id_router_006 | 104 | 0 | 2 | 0 | 111 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|id_router_005|the_default_decode | 0 | 13 | 0 | 13 | 13 | 13 | 13 | 13 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|id_router_005 | 104 | 0 | 2 | 0 | 111 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|id_router_004|the_default_decode | 0 | 13 | 0 | 13 | 13 | 13 | 13 | 13 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|id_router_004 | 104 | 0 | 2 | 0 | 111 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|id_router_003|the_default_decode | 0 | 13 | 0 | 13 | 13 | 13 | 13 | 13 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|id_router_003 | 104 | 0 | 2 | 0 | 111 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|id_router_002|the_default_decode | 0 | 13 | 0 | 13 | 13 | 13 | 13 | 13 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|id_router_002 | 104 | 0 | 2 | 0 | 111 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|id_router_001|the_default_decode | 0 | 13 | 0 | 13 | 13 | 13 | 13 | 13 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|id_router_001 | 104 | 0 | 2 | 0 | 111 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|id_router|the_default_decode | 0 | 13 | 0 | 13 | 13 | 13 | 13 | 13 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|id_router | 104 | 0 | 2 | 0 | 111 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|addr_router_001|the_default_decode | 0 | 13 | 0 | 13 | 13 | 13 | 13 | 13 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|addr_router_001 | 104 | 0 | 6 | 0 | 111 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|addr_router|the_default_decode | 0 | 13 | 0 | 13 | 13 | 13 | 13 | 13 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|addr_router | 104 | 0 | 6 | 0 | 111 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|lcd_0_control_slave_translator_avalon_universal_slave_0_agent_rsp_fifo | 144 | 39 | 0 | 39 | 103 | 39 | 39 | 39 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|lcd_0_control_slave_translator_avalon_universal_slave_0_agent|uncompressor | 41 | 1 | 0 | 1 | 39 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|lcd_0_control_slave_translator_avalon_universal_slave_0_agent | 284 | 38 | 46 | 38 | 307 | 38 | 38 | 38 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|triple_speed_ethernet_0_control_port_translator_avalon_universal_slave_0_agent_rdata_fifo | 77 | 41 | 0 | 41 | 34 | 41 | 41 | 41 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|triple_speed_ethernet_0_control_port_translator_avalon_universal_slave_0_agent_rsp_fifo | 144 | 39 | 0 | 39 | 103 | 39 | 39 | 39 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|triple_speed_ethernet_0_control_port_translator_avalon_universal_slave_0_agent|uncompressor | 41 | 1 | 0 | 1 | 39 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|triple_speed_ethernet_0_control_port_translator_avalon_universal_slave_0_agent | 284 | 38 | 46 | 38 | 307 | 38 | 38 | 38 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|acam_pll_40mhz_pll_slave_translator_avalon_universal_slave_0_agent_rsp_fifo | 144 | 39 | 0 | 39 | 103 | 39 | 39 | 39 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|acam_pll_40mhz_pll_slave_translator_avalon_universal_slave_0_agent|uncompressor | 41 | 1 | 0 | 1 | 39 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|acam_pll_40mhz_pll_slave_translator_avalon_universal_slave_0_agent | 284 | 38 | 46 | 38 | 307 | 38 | 38 | 38 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|acam_nios_bridge_s0_translator_avalon_universal_slave_0_agent_rsp_fifo | 144 | 39 | 0 | 39 | 103 | 39 | 39 | 39 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|acam_nios_bridge_s0_translator_avalon_universal_slave_0_agent|uncompressor | 41 | 1 | 0 | 1 | 39 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|acam_nios_bridge_s0_translator_avalon_universal_slave_0_agent | 284 | 38 | 46 | 38 | 307 | 38 | 38 | 38 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|timer_system_s1_translator_avalon_universal_slave_0_agent_rsp_fifo | 144 | 39 | 0 | 39 | 103 | 39 | 39 | 39 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|timer_system_s1_translator_avalon_universal_slave_0_agent|uncompressor | 41 | 1 | 0 | 1 | 39 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|timer_system_s1_translator_avalon_universal_slave_0_agent | 284 | 38 | 46 | 38 | 307 | 38 | 38 | 38 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|jtag_uart_0_avalon_jtag_slave_translator_avalon_universal_slave_0_agent_rsp_fifo | 144 | 39 | 0 | 39 | 103 | 39 | 39 | 39 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|jtag_uart_0_avalon_jtag_slave_translator_avalon_universal_slave_0_agent|uncompressor | 41 | 1 | 0 | 1 | 39 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|jtag_uart_0_avalon_jtag_slave_translator_avalon_universal_slave_0_agent | 284 | 38 | 46 | 38 | 307 | 38 | 38 | 38 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|oc_ram_32k_s1_translator_avalon_universal_slave_0_agent_rsp_fifo | 144 | 39 | 0 | 39 | 103 | 39 | 39 | 39 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|oc_ram_32k_s1_translator_avalon_universal_slave_0_agent|uncompressor | 41 | 1 | 0 | 1 | 39 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|oc_ram_32k_s1_translator_avalon_universal_slave_0_agent | 284 | 38 | 46 | 38 | 307 | 38 | 38 | 38 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|oc_rom_32k_s1_translator_avalon_universal_slave_0_agent_rsp_fifo | 144 | 39 | 0 | 39 | 103 | 39 | 39 | 39 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|oc_rom_32k_s1_translator_avalon_universal_slave_0_agent|uncompressor | 41 | 1 | 0 | 1 | 39 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|oc_rom_32k_s1_translator_avalon_universal_slave_0_agent | 284 | 38 | 46 | 38 | 307 | 38 | 38 | 38 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii_jtag_debug_module_translator_avalon_universal_slave_0_agent_rsp_fifo | 144 | 39 | 0 | 39 | 103 | 39 | 39 | 39 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii_jtag_debug_module_translator_avalon_universal_slave_0_agent|uncompressor | 41 | 1 | 0 | 1 | 39 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii_jtag_debug_module_translator_avalon_universal_slave_0_agent | 284 | 38 | 46 | 38 | 307 | 38 | 38 | 38 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii_data_master_translator_avalon_universal_master_0_agent | 181 | 34 | 81 | 34 | 136 | 34 | 34 | 34 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii_instruction_master_translator_avalon_universal_master_0_agent | 181 | 34 | 81 | 34 | 136 | 34 | 34 | 34 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|avalonexport1_0_avalon_slave_translator | 96 | 3 | 11 | 3 | 74 | 3 | 3 | 3 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|acam_nios_bridge_m0_translator | 97 | 7 | 2 | 7 | 93 | 7 | 7 | 7 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|lcd_0_control_slave_translator | 81 | 27 | 50 | 27 | 47 | 27 | 27 | 27 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|triple_speed_ethernet_0_control_port_translator | 105 | 2 | 17 | 2 | 76 | 2 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|acam_pll_40mhz_pll_slave_translator | 105 | 3 | 23 | 3 | 70 | 3 | 3 | 3 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|acam_nios_bridge_s0_translator | 105 | 1 | 9 | 1 | 90 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|timer_system_s1_translator | 89 | 19 | 40 | 19 | 56 | 19 | 19 | 19 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|jtag_uart_0_avalon_jtag_slave_translator | 105 | 2 | 27 | 2 | 70 | 2 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|oc_ram_32k_s1_translator | 105 | 4 | 12 | 4 | 86 | 4 | 4 | 4 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|oc_rom_32k_s1_translator | 105 | 4 | 12 | 4 | 87 | 4 | 4 | 4 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii_jtag_debug_module_translator | 105 | 3 | 16 | 3 | 83 | 3 | 3 | 3 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii_data_master_translator | 106 | 9 | 0 | 9 | 101 | 9 | 9 | 9 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii_instruction_master_translator | 106 | 48 | 0 | 48 | 101 | 48 | 48 | 48 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|lcd_0 | 15 | 0 | 3 | 0 | 11 | 0 | 0 | 0 | 8 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|triple_speed_ethernet_0|altera_tse_mac_inst|top_gen_host_inst | 123 | 7 | 9 | 7 | 133 | 7 | 7 | 7 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|triple_speed_ethernet_0|altera_tse_mac_inst|reset_sync_4 | 2 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|triple_speed_ethernet_0|altera_tse_mac_inst|reset_sync_3 | 2 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|triple_speed_ethernet_0|altera_tse_mac_inst|reset_sync_2 | 2 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|triple_speed_ethernet_0|altera_tse_mac_inst|reset_sync_1 | 2 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|triple_speed_ethernet_0|altera_tse_mac_inst|reset_sync_0 | 2 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|triple_speed_ethernet_0|altera_tse_mac_inst | 98 | 0 | 0 | 0 | 88 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|triple_speed_ethernet_0 | 98 | 0 | 0 | 0 | 88 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|avalonexport1_0 | 74 | 0 | 0 | 0 | 74 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|acam_pll_40mhz|sd1 | 3 | 1 | 0 | 1 | 8 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|acam_pll_40mhz|stdsync2|dffpipe3 | 3 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|acam_pll_40mhz|stdsync2 | 3 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|acam_pll_40mhz | 38 | 30 | 30 | 30 | 33 | 30 | 30 | 30 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|acam_nios_bridge|rsp_fifo|read_crosser | 5 | 0 | 0 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|acam_nios_bridge|rsp_fifo|write_crosser | 5 | 0 | 0 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|acam_nios_bridge|rsp_fifo | 38 | 1 | 0 | 1 | 37 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|acam_nios_bridge|cmd_fifo|read_crosser | 5 | 0 | 0 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|acam_nios_bridge|cmd_fifo|write_crosser | 5 | 0 | 0 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|acam_nios_bridge|cmd_fifo | 62 | 0 | 0 | 0 | 58 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|acam_nios_bridge | 94 | 0 | 0 | 0 | 90 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|timer_system | 24 | 0 | 15 | 0 | 17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|jtag_uart_0|the_PhotonFinish2_qsys_jtag_uart_0_scfifo_r|rfifo|auto_generated|dpfifo|wr_ptr | 4 | 0 | 0 | 0 | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|jtag_uart_0|the_PhotonFinish2_qsys_jtag_uart_0_scfifo_r|rfifo|auto_generated|dpfifo|rd_ptr_count | 4 | 0 | 0 | 0 | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|jtag_uart_0|the_PhotonFinish2_qsys_jtag_uart_0_scfifo_r|rfifo|auto_generated|dpfifo|FIFOram|altsyncram1 | 24 | 0 | 0 | 0 | 8 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|jtag_uart_0|the_PhotonFinish2_qsys_jtag_uart_0_scfifo_r|rfifo|auto_generated|dpfifo|FIFOram | 24 | 0 | 0 | 0 | 8 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|jtag_uart_0|the_PhotonFinish2_qsys_jtag_uart_0_scfifo_r|rfifo|auto_generated|dpfifo|fifo_state|count_usedw | 5 | 0 | 0 | 0 | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|jtag_uart_0|the_PhotonFinish2_qsys_jtag_uart_0_scfifo_r|rfifo|auto_generated|dpfifo|fifo_state | 5 | 0 | 0 | 0 | 8 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|jtag_uart_0|the_PhotonFinish2_qsys_jtag_uart_0_scfifo_r|rfifo|auto_generated|dpfifo | 13 | 0 | 0 | 0 | 16 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|jtag_uart_0|the_PhotonFinish2_qsys_jtag_uart_0_scfifo_r|rfifo|auto_generated | 12 | 0 | 0 | 0 | 16 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|jtag_uart_0|the_PhotonFinish2_qsys_jtag_uart_0_scfifo_r | 13 | 0 | 1 | 0 | 16 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|jtag_uart_0|the_PhotonFinish2_qsys_jtag_uart_0_scfifo_w|wfifo|auto_generated|dpfifo|wr_ptr | 4 | 0 | 0 | 0 | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|jtag_uart_0|the_PhotonFinish2_qsys_jtag_uart_0_scfifo_w|wfifo|auto_generated|dpfifo|rd_ptr_count | 4 | 0 | 0 | 0 | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|jtag_uart_0|the_PhotonFinish2_qsys_jtag_uart_0_scfifo_w|wfifo|auto_generated|dpfifo|FIFOram|altsyncram1 | 24 | 0 | 0 | 0 | 8 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|jtag_uart_0|the_PhotonFinish2_qsys_jtag_uart_0_scfifo_w|wfifo|auto_generated|dpfifo|FIFOram | 24 | 0 | 0 | 0 | 8 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|jtag_uart_0|the_PhotonFinish2_qsys_jtag_uart_0_scfifo_w|wfifo|auto_generated|dpfifo|fifo_state|count_usedw | 5 | 0 | 0 | 0 | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|jtag_uart_0|the_PhotonFinish2_qsys_jtag_uart_0_scfifo_w|wfifo|auto_generated|dpfifo|fifo_state | 5 | 0 | 0 | 0 | 8 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|jtag_uart_0|the_PhotonFinish2_qsys_jtag_uart_0_scfifo_w|wfifo|auto_generated|dpfifo | 13 | 0 | 0 | 0 | 16 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|jtag_uart_0|the_PhotonFinish2_qsys_jtag_uart_0_scfifo_w|wfifo|auto_generated | 12 | 0 | 0 | 0 | 16 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|jtag_uart_0|the_PhotonFinish2_qsys_jtag_uart_0_scfifo_w | 12 | 0 | 0 | 0 | 16 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|jtag_uart_0 | 38 | 10 | 23 | 10 | 34 | 10 | 10 | 10 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|oc_ram_32k|the_altsyncram|auto_generated | 52 | 0 | 0 | 0 | 32 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|oc_ram_32k | 54 | 0 | 1 | 0 | 32 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|oc_rom_32k|the_altsyncram|auto_generated | 52 | 0 | 0 | 0 | 32 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|oc_rom_32k | 55 | 0 | 1 | 0 | 32 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii|the_PhotonFinish2_qsys_Nios_II_nios2_oci|the_PhotonFinish2_qsys_Nios_II_jtag_debug_module_wrapper|the_PhotonFinish2_qsys_Nios_II_jtag_debug_module_sysclk | 43 | 0 | 0 | 0 | 51 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii|the_PhotonFinish2_qsys_Nios_II_nios2_oci|the_PhotonFinish2_qsys_Nios_II_jtag_debug_module_wrapper|the_PhotonFinish2_qsys_Nios_II_jtag_debug_module_tck | 130 | 0 | 1 | 0 | 43 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii|the_PhotonFinish2_qsys_Nios_II_nios2_oci|the_PhotonFinish2_qsys_Nios_II_jtag_debug_module_wrapper | 123 | 0 | 0 | 0 | 53 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii|the_PhotonFinish2_qsys_Nios_II_nios2_oci|the_PhotonFinish2_qsys_Nios_II_nios2_oci_im|PhotonFinish2_qsys_Nios_II_traceram_lpm_dram_bdp_component|the_altsyncram|auto_generated | 92 | 0 | 0 | 0 | 72 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii|the_PhotonFinish2_qsys_Nios_II_nios2_oci|the_PhotonFinish2_qsys_Nios_II_nios2_oci_im|PhotonFinish2_qsys_Nios_II_traceram_lpm_dram_bdp_component | 92 | 2 | 0 | 2 | 72 | 2 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii|the_PhotonFinish2_qsys_Nios_II_nios2_oci|the_PhotonFinish2_qsys_Nios_II_nios2_oci_im | 97 | 36 | 17 | 36 | 48 | 36 | 36 | 36 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii|the_PhotonFinish2_qsys_Nios_II_nios2_oci|the_PhotonFinish2_qsys_Nios_II_nios2_oci_pib | 39 | 20 | 38 | 20 | 19 | 20 | 20 | 20 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii|the_PhotonFinish2_qsys_Nios_II_nios2_oci|the_PhotonFinish2_qsys_Nios_II_nios2_oci_fifo|the_PhotonFinish2_qsys_Nios_II_oci_test_bench | 36 | 0 | 36 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii|the_PhotonFinish2_qsys_Nios_II_nios2_oci|the_PhotonFinish2_qsys_Nios_II_nios2_oci_fifo|PhotonFinish2_qsys_Nios_II_nios2_oci_fifocount_inc_fifocount | 5 | 0 | 0 | 0 | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii|the_PhotonFinish2_qsys_Nios_II_nios2_oci|the_PhotonFinish2_qsys_Nios_II_nios2_oci_fifo|PhotonFinish2_qsys_Nios_II_nios2_oci_fifowp_inc_fifowp | 4 | 2 | 0 | 2 | 4 | 2 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii|the_PhotonFinish2_qsys_Nios_II_nios2_oci|the_PhotonFinish2_qsys_Nios_II_nios2_oci_fifo|PhotonFinish2_qsys_Nios_II_nios2_oci_compute_tm_count_tm_count | 3 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii|the_PhotonFinish2_qsys_Nios_II_nios2_oci|the_PhotonFinish2_qsys_Nios_II_nios2_oci_fifo | 151 | 0 | 65 | 0 | 36 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii|the_PhotonFinish2_qsys_Nios_II_nios2_oci|the_PhotonFinish2_qsys_Nios_II_nios2_oci_dtrace|PhotonFinish2_qsys_Nios_II_nios2_oci_trc_ctrl_td_mode | 9 | 0 | 6 | 0 | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii|the_PhotonFinish2_qsys_Nios_II_nios2_oci|the_PhotonFinish2_qsys_Nios_II_nios2_oci_dtrace | 110 | 0 | 99 | 0 | 72 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii|the_PhotonFinish2_qsys_Nios_II_nios2_oci|the_PhotonFinish2_qsys_Nios_II_nios2_oci_itrace | 25 | 17 | 23 | 17 | 87 | 17 | 17 | 17 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii|the_PhotonFinish2_qsys_Nios_II_nios2_oci|the_PhotonFinish2_qsys_Nios_II_nios2_oci_dbrk | 95 | 0 | 0 | 0 | 99 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii|the_PhotonFinish2_qsys_Nios_II_nios2_oci|the_PhotonFinish2_qsys_Nios_II_nios2_oci_xbrk | 61 | 5 | 58 | 5 | 6 | 5 | 5 | 5 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii|the_PhotonFinish2_qsys_Nios_II_nios2_oci|the_PhotonFinish2_qsys_Nios_II_nios2_oci_break | 52 | 36 | 6 | 36 | 71 | 36 | 36 | 36 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii|the_PhotonFinish2_qsys_Nios_II_nios2_oci|the_PhotonFinish2_qsys_Nios_II_nios2_avalon_reg | 49 | 0 | 29 | 0 | 68 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii|the_PhotonFinish2_qsys_Nios_II_nios2_oci|the_PhotonFinish2_qsys_Nios_II_nios2_ocimem|PhotonFinish2_qsys_Nios_II_ociram_lpm_dram_bdp_component|the_altsyncram|auto_generated | 90 | 0 | 0 | 0 | 64 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii|the_PhotonFinish2_qsys_Nios_II_nios2_oci|the_PhotonFinish2_qsys_Nios_II_nios2_ocimem|PhotonFinish2_qsys_Nios_II_ociram_lpm_dram_bdp_component | 90 | 2 | 0 | 2 | 64 | 2 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii|the_PhotonFinish2_qsys_Nios_II_nios2_oci|the_PhotonFinish2_qsys_Nios_II_nios2_ocimem | 93 | 0 | 6 | 0 | 64 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii|the_PhotonFinish2_qsys_Nios_II_nios2_oci|the_PhotonFinish2_qsys_Nios_II_nios2_oci_debug | 50 | 1 | 30 | 1 | 7 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii|the_PhotonFinish2_qsys_Nios_II_nios2_oci | 172 | 0 | 0 | 0 | 68 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii|PhotonFinish2_qsys_Nios_II_register_bank_b|the_altsyncram|auto_generated | 44 | 0 | 0 | 0 | 32 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii|PhotonFinish2_qsys_Nios_II_register_bank_b | 44 | 0 | 0 | 0 | 32 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii|PhotonFinish2_qsys_Nios_II_register_bank_a|the_altsyncram|auto_generated | 44 | 0 | 0 | 0 | 32 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii|PhotonFinish2_qsys_Nios_II_register_bank_a | 44 | 0 | 0 | 0 | 32 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii|the_PhotonFinish2_qsys_Nios_II_test_bench | 487 | 3 | 450 | 3 | 34 | 3 | 3 | 3 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard|nios_ii | 149 | 0 | 30 | 0 | 123 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 
| ArriaEvalBoard | 85 | 9 | 0 | 9 | 100 | 9 | 9 | 9 | 8 | 0 | 0 | 0 | 8 | 
| TheWholeHDLinterface | 101 | 42 | 55 | 42 | 86 | 42 | 42 | 42 | 30 | 0 | 2 | 0 | 2 |